coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 bootblock starting (log level: 7)...
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: mcache @0xfeff0e00 built for 12 files, used 0x2b0 of 0x4000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0x16158 in mcache @0xfeff0e2c
BS: bootblock times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 romstage starting (log level: 7)...
full_reset() called!


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 bootblock starting (log level: 7)...
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: mcache @0xfeff0e00 built for 12 files, used 0x2b0 of 0x4000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0x16158 in mcache @0xfeff0e2c
BS: bootblock times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 romstage starting (log level: 7)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 620000 (65536 bytes)
MRC: no data in 'RW_MRC_CACHE'
ECC supported: no ECC forced: no
ECC RAM unsupported.
SPD probe channel0, slot0
  Row    addr bits  : 14
  Column addr bits  : 10
  Number of ranks   : 2
  DIMM Capacity     : 2048 MB
  CAS latencies     : 5 6 7 8
  tCKmin            :   1.875 ns
  tAAmin            :  13.125 ns
  tWRmin            :  15.000 ns
  tRCDmin           :  13.125 ns
  tRRDmin           :   7.500 ns
  tRPmin            :  13.125 ns
  tRASmin           :  37.500 ns
  tRCmin            :  50.625 ns
  tRFCmin           : 110.000 ns
  tWTRmin           :   7.500 ns
  tRTPmin           :   7.500 ns
  tFAWmin           :  37.500 ns
channel[0] rankmap = 0x3
SPD probe channel0, slot1
SPD probe channel1, slot0
SPD probe channel1, slot1
ECC is disabled
Starting Sandy Bridge RAM training (full initialization).
100MHz reference clock support: no
PLL_REF100_CFG value: 0x0
Trying CAS 9, tCK 384.
Trying CAS 7, tCK 480.
Found compatible clock, CAS pair.
Selected DRAM frequency: 533 MHz
Selected CAS latency   : 7T
MPLL busy... done in 10 us
MPLL frequency is set at : 533 MHz
Selected CWL latency   : 6T
Selected tRCD          : 7T
Selected tRP           : 7T
Selected tRAS          : 20T
Selected tWR           : 8T
Selected tFAW          : 20T
Selected tRRD          : 4T
Selected tRTP          : 4T
Selected tWTR          : 4T
Selected tRFC          : 59T
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 80000000
PCI(0, 0, 0)[a4] = 0
PCI(0, 0, 0)[bc] = 7f200000
PCI(0, 0, 0)[a8] = 600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = 7c800000
PCI(0, 0, 0)[b0] = 7d200000
PCI(0, 0, 0)[b4] = 7d000000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = 7f800000
PCI(0, 0, 0)[74] = 0
PCI(0, 0, 0)[78] = ff800c00
Done memory map
Done io registers
Done jedec reset
Done MRS commands
t123: 2128, 9120, 500
ME: FWS2: 0x104e0006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x4e
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
Waited long enough, or CPU was not replaced, continue...
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x10240006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x24
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Non-power cycle reset


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 bootblock starting (log level: 7)...
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: mcache @0xfeff0e00 built for 12 files, used 0x2b0 of 0x4000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0x16158 in mcache @0xfeff0e2c
BS: bootblock times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 romstage starting (log level: 7)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting native Platform init
system_reset() called!


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 bootblock starting (log level: 7)...
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: mcache @0xfeff0e00 built for 12 files, used 0x2b0 of 0x4000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0x16158 in mcache @0xfeff0e2c
BS: bootblock times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 romstage starting (log level: 7)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 620000 (65536 bytes)
MRC: no data in 'RW_MRC_CACHE'
ECC supported: no ECC forced: no
ECC RAM unsupported.
SPD probe channel0, slot0
  Row    addr bits  : 14
  Column addr bits  : 10
  Number of ranks   : 2
  DIMM Capacity     : 2048 MB
  CAS latencies     : 5 6 7 8
  tCKmin            :   1.875 ns
  tAAmin            :  13.125 ns
  tWRmin            :  15.000 ns
  tRCDmin           :  13.125 ns
  tRRDmin           :   7.500 ns
  tRPmin            :  13.125 ns
  tRASmin           :  37.500 ns
  tRCmin            :  50.625 ns
  tRFCmin           : 110.000 ns
  tWTRmin           :   7.500 ns
  tRTPmin           :   7.500 ns
  tFAWmin           :  37.500 ns
channel[0] rankmap = 0x3
SPD probe channel0, slot1
SPD probe channel1, slot0
SPD probe channel1, slot1
ECC is disabled
Starting Sandy Bridge RAM training (full initialization).
100MHz reference clock support: no
PLL_REF100_CFG value: 0x0
Trying CAS 9, tCK 384.
Trying CAS 7, tCK 480.
Found compatible clock, CAS pair.
Selected DRAM frequency: 533 MHz
Selected CAS latency   : 7T
MPLL busy... done in 10 us
MPLL frequency is set at : 533 MHz
Selected CWL latency   : 6T
Selected tRCD          : 7T
Selected tRP           : 7T
Selected tRAS          : 20T
Selected tWR           : 8T
Selected tFAW          : 20T
Selected tRRD          : 4T
Selected tRTP          : 4T
Selected tWTR          : 4T
Selected tRFC          : 59T
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 80000000
PCI(0, 0, 0)[a4] = 0
PCI(0, 0, 0)[bc] = 7f200000
PCI(0, 0, 0)[a8] = 600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = 7c800000
PCI(0, 0, 0)[b0] = 7d200000
PCI(0, 0, 0)[b4] = 7d000000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = 7f800000
PCI(0, 0, 0)[74] = 0
PCI(0, 0, 0)[78] = ff800c00
Done memory map
Done io registers
Done jedec reset
Done MRS commands
t123: 2128, 9120, 500
ME: FWS2: 0x164e0006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x4e
ME:  Current PM event: 0x6
ME:  Progress code   : 0x1
Waited long enough, or CPU was not replaced, continue...
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x162c0006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x2c
ME:  Current PM event: 0x6
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Pseudo-global reset
ME: Progress Phase State    : 0x2c
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1064 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00620008):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x8 dual rank, selected
   DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00000000):
   ECC inactive
   enhanced interleave mode off
   rank interleave off
   DIMMA 0 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 0x7c7ff000 254 entries.
IMD: root @ 0x7c7fec00 62 entries.
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
External stage cache:
IMD: root @ 0x7cbff000 254 entries.
IMD: root @ 0x7cbfec00 62 entries.
FMAP: area RW_MRC_CACHE found @ 620000 (65536 bytes)
MRC: Checking cached data update for 'RW_MRC_CACHE'.
MRC: no data in 'RW_MRC_CACHE'
MRC: cache data 'RW_MRC_CACHE' needs update.
MRC: updated 'RW_MRC_CACHE'.
CBMEM entry for DIMM info: 0x7c7dc000
SMM Memory Map
SMRAM       : 0x7c800000 0x800000
 Subregion 0: 0x7c800000 0x300000
 Subregion 1: 0x7cb00000 0x100000
 Subregion 2: 0x7cc00000 0x400000
Normal boot
CBFS: Found 'fallback/postcar' @0x3c800 size 0x9024 in mcache @0xfeff0ffc
Loading module at 0x7c7cd000 with entry 0x7c7cd031. filesize: 0x88a0 memsize: 0xed08
Processing 465 relocs. Offset value of 0x7a7cd000
BS: romstage times (exec / console): total (unknown) / 67 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 postcar starting (log level: 7)...
Normal boot
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: Found 'fallback/ramstage' @0x1cac0 size 0x1c0cf in mcache @0x7c7fea1c
Loading module at 0x7c781000 with entry 0x7c781000. filesize: 0x38938 memsize: 0x4aa70
Processing 3841 relocs. Offset value of 0x78781000
BS: postcar times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 ramstage starting (log level: 7)...
Normal boot
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] enabled
PCI: 00:01.0 [8086/0101] enabled
PCI: 00:01.1 [8086/0105] enabled
PCI: 00:02.0 [8086/0126] enabled
PCI: 00:04.0 [8086/0103] disabled
PCI: 00:14.0: Disabling device
PCI: 00:16.0 [8086/1c3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1c3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1c3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1c3d] disabled No operations
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/1c20] enabled
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1 [8086/1c12] enabled
PCI: 00:1c.2 [8086/1c14] enabled
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/1c49] enabled
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1c09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1c24] disabled No operations
PCI: Leftover static devices:
PCI: 00:01.2
PCI: 00:06.0
PCI: 00:14.0
PCI: 00:19.0
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
scan_bus: bus PCI: 00:01.0 finished in 0 msecs
PCI: 00:01.1 scanning...
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 subordinate bus PCI Express
PCI: 02:00.0 [8086/1513] enabled
PCI: 02:00.0 scanning...
PCI: 02:00.0: No LTR support
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 subordinate bus PCI Express
PCI: 03:00.0 [8086/1513] enabled
PCI: 03:03.0 subordinate bus PCI Express
PCI: 03:03.0 hot-plug capable
PCI: 03:03.0 [8086/1513] enabled
PCI: 03:04.0 subordinate bus PCI Express
PCI: 03:04.0 hot-plug capable
PCI: 03:04.0 [8086/1513] enabled
PCI: 03:05.0 subordinate bus PCI Express
PCI: 03:05.0 hot-plug capable
PCI: 03:05.0 [8086/1513] enabled
PCI: 03:06.0 subordinate bus PCI Express
PCI: 03:06.0 hot-plug capable
PCI: 03:06.0 [8086/1513] enabled
PCI: 03:00.0 scanning...
PCI: 03:00.0: No LTR support
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [8086/1513] enabled
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 04:00.0: No LTR support
scan_bus: bus PCI: 03:00.0 finished in 3 msecs
PCI: 03:03.0 scanning...
PCI: 03:03.0: No LTR support
PCI: pci_scan_bus for bus 05
scan_bus: bus PCI: 03:03.0 finished in 1 msecs
PCI: 03:04.0 scanning...
PCI: 03:04.0: No LTR support
PCI: pci_scan_bus for bus 0e
scan_bus: bus PCI: 03:04.0 finished in 1 msecs
PCI: 03:05.0 scanning...
PCI: 03:05.0: No LTR support
PCI: pci_scan_bus for bus 17
scan_bus: bus PCI: 03:05.0 finished in 1 msecs
PCI: 03:06.0 scanning...
PCI: 03:06.0: No LTR support
PCI: pci_scan_bus for bus 20
scan_bus: bus PCI: 03:06.0 finished in 0 msecs
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:00.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:03.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:04.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:05.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:06.0: No LTR support
scan_bus: bus PCI: 02:00.0 finished in 27 msecs
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 02:00.0: No LTR support
scan_bus: bus PCI: 00:01.1 finished in 35 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 29
PCI: 29:00.0 [14e4/16b4] enabled
PCI: 29:00.1 [14e4/16bc] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 29:00.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 29:00.1: No LTR support
scan_bus: bus PCI: 00:1c.0 finished in 5 msecs
PCI: 00:1c.1 scanning...
PCI: pci_scan_bus for bus 2a
PCI: 2a:00.0 [14e4/4331] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 2a:00.0: No LTR support
scan_bus: bus PCI: 00:1c.1 finished in 3 msecs
PCI: 00:1c.2 scanning...
PCI: pci_scan_bus for bus 2b
PCI: 2b:00.0 [11c1/5901] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.2 finished in 2 msecs
PCI: 00:1c.3 scanning...
PCI: pci_scan_bus for bus 2c
scan_bus: bus PCI: 00:1c.3 finished in 0 msecs
PCI: 00:1f.0 scanning...
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 76 msecs
scan_bus: bus Root Device finished in 78 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 74 ms
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
TOUUD 0x100600000 TOLUD 0x7f200000 TOM 0x80000000
MEBASE 0x7f800000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x7c800000 size 8M
Available memory below 4GB: 1992M
Available memory above 4GB: 6M
Done reading resources.
=== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
   PCI: 03:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
   PCI: 03:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff done
   PCI: 03:03.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:03.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:04.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:04.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:05.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:05.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:06.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:06.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
  PCI: 02:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
   PCI: 03:03.0 1c *  [0x0 - 0x1fff] io
   PCI: 03:04.0 1c *  [0x2000 - 0x3fff] io
   PCI: 03:05.0 1c *  [0x4000 - 0x5fff] io
   PCI: 03:06.0 1c *  [0x6000 - 0x7fff] io
  PCI: 02:00.0 io: size: 8000 align: 12 gran: 12 limit: ffff done
 PCI: 00:01.1 io: size: 0 align: 12 gran: 12 limit: ffff
  PCI: 02:00.0 1c *  [0x0 - 0x7fff] io
 PCI: 00:01.1 io: size: 8000 align: 12 gran: 12 limit: ffff done
   PCI: 03:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    PCI: 04:00.0 10 *  [0x0 - 0x3ffff] mem
    PCI: 04:00.0 14 *  [0x40000 - 0x40fff] mem
   PCI: 03:00.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:03.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:03.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:04.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:04.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:05.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:05.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:06.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
  PCI: 02:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
   PCI: 03:03.0 20 *  [0x0 - 0x7fffff] mem
   PCI: 03:04.0 20 *  [0x800000 - 0xffffff] mem
   PCI: 03:05.0 20 *  [0x1000000 - 0x17fffff] mem
   PCI: 03:06.0 20 *  [0x1800000 - 0x1ffffff] mem
   PCI: 03:00.0 20 *  [0x2000000 - 0x20fffff] mem
  PCI: 02:00.0 mem: size: 2100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:01.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 02:00.0 20 *  [0x0 - 0x20fffff] mem
 PCI: 00:01.1 mem: size: 2100000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
   PCI: 03:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:03.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:03.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:04.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:04.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:05.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:05.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:06.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
  PCI: 02:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
   PCI: 03:03.0 24 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:04.0 24 *  [0x10000000 - 0x1fffffff] prefmem
   PCI: 03:05.0 24 *  [0x20000000 - 0x2fffffff] prefmem
   PCI: 03:06.0 24 *  [0x30000000 - 0x3fffffff] prefmem
  PCI: 02:00.0 prefmem: size: 40000000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:01.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  PCI: 02:00.0 24 *  [0x0 - 0x3fffffff] prefmem
 PCI: 00:01.1 prefmem: size: 40000000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  PCI: 29:00.0 10 *  [0x0 - 0xffff] prefmem
  PCI: 29:00.0 18 *  [0x10000 - 0x1ffff] prefmem
  PCI: 29:00.1 10 *  [0x20000 - 0x2ffff] prefmem
 PCI: 00:1c.0 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 2a:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 2b:00.0 10 *  [0x0 - 0xfff] mem
 PCI: 00:1c.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
 update_constraints: PCI: 00:1f.0 10000200 base 00001640 limit 0000164b io (fixed)
 update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 1000, Size: 640, Tag: 100
 * Base: 164c, Size: e9b4, Tag: 100
  PCI: 00:01.1 1c *  [0x2000 - 0x9fff] limit: 9fff io
  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
  PCI: 00:1f.2 20 *  [0x1040 - 0x105f] limit: 105f io
  PCI: 00:1f.2 10 *  [0x1060 - 0x1067] limit: 1067 io
  PCI: 00:1f.2 18 *  [0x1068 - 0x106f] limit: 106f io
  PCI: 00:1f.2 14 *  [0x1070 - 0x1073] limit: 1073 io
  PCI: 00:1f.2 1c *  [0x1074 - 0x1077] limit: 1077 io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
 update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base 00100000 limit 7c7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base 100000000 limit 1005fffff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base 7c800000 limit 7f1fffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 20000000 limit 201fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 40000000 limit 401fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base fed90000 limit fed90fff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
 update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 7f200000, Size: 70e00000, Tag: 200
 * Base: f4000000, Size: ac00000, Tag: 200
 * Base: fec01000, Size: 18f000, Tag: 200
 * Base: fed92000, Size: 26e000, Tag: 200
 * Base: 100600000, Size: effa00000, Tag: 100200
  PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
  PCI: 00:02.0 10 *  [0x7f400000 - 0x7f7fffff] limit: 7f7fffff mem
  PCI: 00:01.1 20 *  [0x90000000 - 0x920fffff] limit: 920fffff mem
  PCI: 00:1c.0 24 *  [0x7f200000 - 0x7f2fffff] limit: 7f2fffff prefmem
  PCI: 00:1c.1 20 *  [0x7f300000 - 0x7f3fffff] limit: 7f3fffff mem
  PCI: 00:1c.2 20 *  [0x7f800000 - 0x7f8fffff] limit: 7f8fffff mem
  PCI: 00:1b.0 10 *  [0x7f900000 - 0x7f903fff] limit: 7f903fff mem
  PCI: 00:1f.2 24 *  [0x7f904000 - 0x7f9047ff] limit: 7f9047ff mem
  PCI: 00:1a.0 10 *  [0x7f905000 - 0x7f9053ff] limit: 7f9053ff mem
  PCI: 00:1d.0 10 *  [0x7f906000 - 0x7f9063ff] limit: 7f9063ff mem
  PCI: 00:1f.3 10 *  [0x7f907000 - 0x7f9070ff] limit: 7f9070ff mem
  PCI: 00:16.0 10 *  [0x7f908000 - 0x7f90800f] limit: 7f90800f mem
  PCI: 00:01.1 24 *  [0x100600000 - 0x1405fffff] limit: 1405fffff prefmem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
PCI: 00:01.1 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff
 PCI: 00:01.1: Resource ranges:
 * Base: 2000, Size: 8000, Tag: 100
  PCI: 02:00.0 1c *  [0x2000 - 0x9fff] limit: 9fff io
PCI: 00:01.1 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff done
PCI: 00:01.1 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 00:01.1: Resource ranges:
 * Base: 100600000, Size: 40000000, Tag: 1200
  PCI: 02:00.0 24 *  [0x100600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 00:01.1 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 00:01.1 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff
 PCI: 00:01.1: Resource ranges:
 * Base: 90000000, Size: 2100000, Tag: 200
  PCI: 02:00.0 20 *  [0x90000000 - 0x920fffff] limit: 920fffff mem
PCI: 00:01.1 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff done
PCI: 02:00.0 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff
 PCI: 02:00.0: Resource ranges:
 * Base: 2000, Size: 8000, Tag: 100
  PCI: 03:03.0 1c *  [0x2000 - 0x3fff] limit: 3fff io
  PCI: 03:04.0 1c *  [0x4000 - 0x5fff] limit: 5fff io
  PCI: 03:05.0 1c *  [0x6000 - 0x7fff] limit: 7fff io
  PCI: 03:06.0 1c *  [0x8000 - 0x9fff] limit: 9fff io
PCI: 02:00.0 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff done
PCI: 02:00.0 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 02:00.0: Resource ranges:
 * Base: 100600000, Size: 40000000, Tag: 1200
  PCI: 03:03.0 24 *  [0x100600000 - 0x1105fffff] limit: 1105fffff prefmem
  PCI: 03:04.0 24 *  [0x110600000 - 0x1205fffff] limit: 1205fffff prefmem
  PCI: 03:05.0 24 *  [0x120600000 - 0x1305fffff] limit: 1305fffff prefmem
  PCI: 03:06.0 24 *  [0x130600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 02:00.0 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 02:00.0 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff
 PCI: 02:00.0: Resource ranges:
 * Base: 90000000, Size: 2100000, Tag: 200
  PCI: 03:03.0 20 *  [0x90000000 - 0x907fffff] limit: 907fffff mem
  PCI: 03:04.0 20 *  [0x90800000 - 0x90ffffff] limit: 90ffffff mem
  PCI: 03:05.0 20 *  [0x91000000 - 0x917fffff] limit: 917fffff mem
  PCI: 03:06.0 20 *  [0x91800000 - 0x91ffffff] limit: 91ffffff mem
  PCI: 03:00.0 20 *  [0x92000000 - 0x920fffff] limit: 920fffff mem
PCI: 02:00.0 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff done
PCI: 03:00.0 mem: base: 92000000 size: 100000 align: 20 gran: 20 limit: 920fffff
 PCI: 03:00.0: Resource ranges:
 * Base: 92000000, Size: 100000, Tag: 200
  PCI: 04:00.0 10 *  [0x92000000 - 0x9203ffff] limit: 9203ffff mem
  PCI: 04:00.0 14 *  [0x92040000 - 0x92040fff] limit: 92040fff mem
PCI: 03:00.0 mem: base: 92000000 size: 100000 align: 20 gran: 20 limit: 920fffff done
PCI: 03:03.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
 PCI: 03:03.0: Resource ranges:
 * Base: 2000, Size: 2000, Tag: 100
  NONE 18 *  [0x2000 - 0x3fff] limit: 3fff io
PCI: 03:03.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
PCI: 03:03.0 prefmem: base: 100600000 size: 10000000 align: 20 gran: 20 limit: 1105fffff
 PCI: 03:03.0: Resource ranges:
 * Base: 100600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x100600000 - 0x1105fffff] limit: 1105fffff prefmem
PCI: 03:03.0 prefmem: base: 100600000 size: 10000000 align: 20 gran: 20 limit: 1105fffff done
PCI: 03:03.0 mem: base: 90000000 size: 800000 align: 20 gran: 20 limit: 907fffff
 PCI: 03:03.0: Resource ranges:
 * Base: 90000000, Size: 800000, Tag: 200
  NONE 10 *  [0x90000000 - 0x907fffff] limit: 907fffff mem
PCI: 03:03.0 mem: base: 90000000 size: 800000 align: 20 gran: 20 limit: 907fffff done
PCI: 03:04.0 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
 PCI: 03:04.0: Resource ranges:
 * Base: 4000, Size: 2000, Tag: 100
  NONE 18 *  [0x4000 - 0x5fff] limit: 5fff io
PCI: 03:04.0 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
PCI: 03:04.0 prefmem: base: 110600000 size: 10000000 align: 20 gran: 20 limit: 1205fffff
 PCI: 03:04.0: Resource ranges:
 * Base: 110600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x110600000 - 0x1205fffff] limit: 1205fffff prefmem
PCI: 03:04.0 prefmem: base: 110600000 size: 10000000 align: 20 gran: 20 limit: 1205fffff done
PCI: 03:04.0 mem: base: 90800000 size: 800000 align: 20 gran: 20 limit: 90ffffff
 PCI: 03:04.0: Resource ranges:
 * Base: 90800000, Size: 800000, Tag: 200
  NONE 10 *  [0x90800000 - 0x90ffffff] limit: 90ffffff mem
PCI: 03:04.0 mem: base: 90800000 size: 800000 align: 20 gran: 20 limit: 90ffffff done
PCI: 03:05.0 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
 PCI: 03:05.0: Resource ranges:
 * Base: 6000, Size: 2000, Tag: 100
  NONE 18 *  [0x6000 - 0x7fff] limit: 7fff io
PCI: 03:05.0 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
PCI: 03:05.0 prefmem: base: 120600000 size: 10000000 align: 20 gran: 20 limit: 1305fffff
 PCI: 03:05.0: Resource ranges:
 * Base: 120600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x120600000 - 0x1305fffff] limit: 1305fffff prefmem
PCI: 03:05.0 prefmem: base: 120600000 size: 10000000 align: 20 gran: 20 limit: 1305fffff done
PCI: 03:05.0 mem: base: 91000000 size: 800000 align: 20 gran: 20 limit: 917fffff
 PCI: 03:05.0: Resource ranges:
 * Base: 91000000, Size: 800000, Tag: 200
  NONE 10 *  [0x91000000 - 0x917fffff] limit: 917fffff mem
PCI: 03:05.0 mem: base: 91000000 size: 800000 align: 20 gran: 20 limit: 917fffff done
PCI: 03:06.0 io: base: 8000 size: 2000 align: 12 gran: 12 limit: 9fff
 PCI: 03:06.0: Resource ranges:
 * Base: 8000, Size: 2000, Tag: 100
  NONE 18 *  [0x8000 - 0x9fff] limit: 9fff io
PCI: 03:06.0 io: base: 8000 size: 2000 align: 12 gran: 12 limit: 9fff done
PCI: 03:06.0 prefmem: base: 130600000 size: 10000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 03:06.0: Resource ranges:
 * Base: 130600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x130600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 03:06.0 prefmem: base: 130600000 size: 10000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 03:06.0 mem: base: 91800000 size: 800000 align: 20 gran: 20 limit: 91ffffff
 PCI: 03:06.0: Resource ranges:
 * Base: 91800000, Size: 800000, Tag: 200
  NONE 10 *  [0x91800000 - 0x91ffffff] limit: 91ffffff mem
PCI: 03:06.0 mem: base: 91800000 size: 800000 align: 20 gran: 20 limit: 91ffffff done
PCI: 00:1c.0 prefmem: base: 7f200000 size: 100000 align: 20 gran: 20 limit: 7f2fffff
 PCI: 00:1c.0: Resource ranges:
 * Base: 7f200000, Size: 100000, Tag: 1200
  PCI: 29:00.0 10 *  [0x7f200000 - 0x7f20ffff] limit: 7f20ffff prefmem
  PCI: 29:00.0 18 *  [0x7f210000 - 0x7f21ffff] limit: 7f21ffff prefmem
  PCI: 29:00.1 10 *  [0x7f220000 - 0x7f22ffff] limit: 7f22ffff prefmem
PCI: 00:1c.0 prefmem: base: 7f200000 size: 100000 align: 20 gran: 20 limit: 7f2fffff done
PCI: 00:1c.1 mem: base: 7f300000 size: 100000 align: 20 gran: 20 limit: 7f3fffff
 PCI: 00:1c.1: Resource ranges:
 * Base: 7f300000, Size: 100000, Tag: 200
  PCI: 2a:00.0 10 *  [0x7f300000 - 0x7f303fff] limit: 7f303fff mem
PCI: 00:1c.1 mem: base: 7f300000 size: 100000 align: 20 gran: 20 limit: 7f3fffff done
PCI: 00:1c.2 mem: base: 7f800000 size: 100000 align: 20 gran: 20 limit: 7f8fffff
 PCI: 00:1c.2: Resource ranges:
 * Base: 7f800000, Size: 100000, Tag: 200
  PCI: 2b:00.0 10 *  [0x7f800000 - 0x7f800fff] limit: 7f800fff mem
PCI: 00:1c.2 mem: base: 7f800000 size: 100000 align: 20 gran: 20 limit: 7f8fffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:01.1 1c <- [0x0000000000002000 - 0x0000000000009fff] size 0x00008000 gran 0x0c bus 02 io
PCI: 00:01.1 24 <- [0x0000000100600000 - 0x00000001405fffff] size 0x40000000 gran 0x14 bus 02 prefmem
PCI: 00:01.1 20 <- [0x0000000090000000 - 0x00000000920fffff] size 0x02100000 gran 0x14 bus 02 mem
PCI: 02:00.0 1c <- [0x0000000000002000 - 0x0000000000009fff] size 0x00008000 gran 0x0c bus 03 io
PCI: 02:00.0 24 <- [0x0000000100600000 - 0x00000001405fffff] size 0x40000000 gran 0x14 bus 03 prefmem
PCI: 02:00.0 20 <- [0x0000000090000000 - 0x00000000920fffff] size 0x02100000 gran 0x14 bus 03 mem
PCI: 03:00.0 1c <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 03:00.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 03:00.0 20 <- [0x0000000092000000 - 0x00000000920fffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 04:00.0 10 <- [0x0000000092000000 - 0x000000009203ffff] size 0x00040000 gran 0x12 mem
PCI: 04:00.0 14 <- [0x0000000092040000 - 0x0000000092040fff] size 0x00001000 gran 0x0c mem
PCI: 03:03.0 1c <- [0x0000000000002000 - 0x0000000000003fff] size 0x00002000 gran 0x0c bus 05 io
PCI: 03:03.0 24 <- [0x0000000100600000 - 0x00000001105fffff] size 0x10000000 gran 0x14 bus 05 prefmem
PCI: 03:03.0 20 <- [0x0000000090000000 - 0x00000000907fffff] size 0x00800000 gran 0x14 bus 05 mem
PCI: 03:04.0 1c <- [0x0000000000004000 - 0x0000000000005fff] size 0x00002000 gran 0x0c bus 0e io
PCI: 03:04.0 24 <- [0x0000000110600000 - 0x00000001205fffff] size 0x10000000 gran 0x14 bus 0e prefmem
PCI: 03:04.0 20 <- [0x0000000090800000 - 0x0000000090ffffff] size 0x00800000 gran 0x14 bus 0e mem
PCI: 03:05.0 1c <- [0x0000000000006000 - 0x0000000000007fff] size 0x00002000 gran 0x0c bus 17 io
PCI: 03:05.0 24 <- [0x0000000120600000 - 0x00000001305fffff] size 0x10000000 gran 0x14 bus 17 prefmem
PCI: 03:05.0 20 <- [0x0000000091000000 - 0x00000000917fffff] size 0x00800000 gran 0x14 bus 17 mem
PCI: 03:06.0 1c <- [0x0000000000008000 - 0x0000000000009fff] size 0x00002000 gran 0x0c bus 20 io
PCI: 03:06.0 24 <- [0x0000000130600000 - 0x00000001405fffff] size 0x10000000 gran 0x14 bus 20 prefmem
PCI: 03:06.0 20 <- [0x0000000091800000 - 0x0000000091ffffff] size 0x00800000 gran 0x14 bus 20 mem
PCI: 00:02.0 10 <- [0x000000007f400000 - 0x000000007f7fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x0000000080000000 - 0x000000008fffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
PCI: 00:16.0 10 <- [0x000000007f908000 - 0x000000007f90800f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x000000007f905000 - 0x000000007f9053ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x000000007f900000 - 0x000000007f903fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 29 io
PCI: 00:1c.0 24 <- [0x000000007f200000 - 0x000000007f2fffff] size 0x00100000 gran 0x14 bus 29 prefmem
PCI: 00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 29 mem
PCI: 29:00.0 10 <- [0x000000007f200000 - 0x000000007f20ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 29:00.0 18 <- [0x000000007f210000 - 0x000000007f21ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 29:00.1 10 <- [0x000000007f220000 - 0x000000007f22ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 2a io
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 2a prefmem
PCI: 00:1c.1 20 <- [0x000000007f300000 - 0x000000007f3fffff] size 0x00100000 gran 0x14 bus 2a mem
PCI: 2a:00.0 10 <- [0x000000007f300000 - 0x000000007f303fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.2 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 2b io
PCI: 00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 2b prefmem
PCI: 00:1c.2 20 <- [0x000000007f800000 - 0x000000007f8fffff] size 0x00100000 gran 0x14 bus 2b mem
PCI: 2b:00.0 10 <- [0x000000007f800000 - 0x000000007f800fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 2c io
PCI: 00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 2c prefmem
PCI: 00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 2c mem
PCI: 00:1d.0 10 <- [0x000000007f906000 - 0x000000007f9063ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.2 10 <- [0x0000000000001060 - 0x0000000000001067] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000000000001070 - 0x0000000000001073] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000000000001068 - 0x000000000000106f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000000000001074 - 0x0000000000001077] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000000000001040 - 0x000000000000105f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x000000007f904000 - 0x000000007f9047ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x000000007f907000 - 0x000000007f9070ff] size 0x00000100 gran 0x08 mem64
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 3 / 239 ms
Enabling resources...
PCI: 00:00.0 subsystem <- 106b/00de
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0013
PCI: 00:01.0 subsystem <- 106b/00de
PCI: 00:01.0 cmd <- 00
PCI: 00:01.1 bridge ctrl <- 0013
PCI: 00:01.1 subsystem <- 106b/00de
PCI: 00:01.1 cmd <- 07
PCI: 00:02.0 subsystem <- 106b/00de
PCI: 00:02.0 cmd <- 03
PCI: 00:16.0 subsystem <- 8086/7270
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 8086/7270
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 8086/7270
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 8086/7270
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0013
PCI: 00:1c.1 subsystem <- 8086/7270
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0013
PCI: 00:1c.2 subsystem <- 8086/7270
PCI: 00:1c.2 cmd <- 106
PCI: 00:1c.3 bridge ctrl <- 0013
PCI: 00:1c.3 subsystem <- 8086/7270
PCI: 00:1c.3 cmd <- 100
PCI: 00:1d.0 subsystem <- 8086/7270
PCI: 00:1d.0 cmd <- 102
PCI: 00:1f.0 subsystem <- 8086/7270
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 8086/7270
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 8086/7270
PCI: 00:1f.3 cmd <- 103
PCI: 02:00.0 bridge ctrl <- 0003
PCI: 02:00.0 cmd <- 07
PCI: 03:00.0 bridge ctrl <- 0003
PCI: 03:00.0 cmd <- 06
PCI: 03:03.0 bridge ctrl <- 0003
PCI: 03:03.0 cmd <- 07
PCI: 03:04.0 bridge ctrl <- 0003
PCI: 03:04.0 cmd <- 07
PCI: 03:05.0 bridge ctrl <- 0003
PCI: 03:05.0 cmd <- 07
PCI: 03:06.0 bridge ctrl <- 0003
PCI: 03:06.0 cmd <- 07
PCI: 04:00.0 cmd <- 06
PCI: 29:00.0 cmd <- 02
PCI: 29:00.1 cmd <- 06
PCI: 2a:00.0 cmd <- 02
PCI: 2b:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE run times (exec / console): 0 / 21 ms
Initializing devices...
CPU_CLUSTER: 0 init
MTRR: Physical address space:
0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
0x00000000000c0000 - 0x000000007c7fffff size 0x7c740000 type 6
0x000000007c800000 - 0x000000007fffffff size 0x03800000 type 0
0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 1
0x0000000090000000 - 0x00000000ffffffff size 0x70000000 type 0
0x0000000100000000 - 0x00000001005fffff size 0x00600000 type 6
0x0000000100600000 - 0x00000001405fffff size 0x40000000 type 0
apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 17/7.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x000000007c800000 mask 0x0000000fff800000 type 0
MTRR: 2 base 0x000000007d000000 mask 0x0000000fff000000 type 0
MTRR: 3 base 0x000000007e000000 mask 0x0000000ffe000000 type 0
MTRR: 4 base 0x0000000080000000 mask 0x0000000ff0000000 type 1
MTRR: 5 base 0x0000000100000000 mask 0x0000000fffc00000 type 6
MTRR: 6 base 0x0000000100400000 mask 0x0000000fffe00000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU has 2 cores, 4 threads enabled.
Setting up SMI for CPU
Will perform SMM setup.
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: Found 'cpu_microcode_blob.bin' @0x16280 size 0x6800 in mcache @0x7c7fe9ec
microcode: sig=0x206a7 pf=0x10 revision=0x2f
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
LAPIC 0x0 in XAPIC mode.
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 3 APs
Waiting for 10ms after sending INIT.
Waiting for SIPI to complete...
LAPIC 0x1 in XAPIC mode.
done.
AP: slot 1 apic_id 1, MCU rev: 0x0000002f
Waiting for SIPI to complete...
done.
LAPIC 0x3 in XAPIC mode.
LAPIC 0x2 in XAPIC mode.
AP: slot 2 apic_id 3, MCU rev: 0x0000002f
AP: slot 3 apic_id 2, MCU rev: 0x0000002f
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8
Processing 11 relocs. Offset value of 0x00038000
smm_module_setup_stub: stack_top = 0x7c801000
smm_module_setup_stub: per cpu stack_size = 0x400
smm_module_setup_stub: runtime.start32_offset = 0x4c
smm_module_setup_stub: runtime.smm_size = 0x10000
SMM Module: stub loaded at 38000. Will call 0x7c79d6a6
Installing permanent SMM handler to 0x7c800000
FX_SAVE      [0x7caff800-0x7cb00000]
HANDLER      [0x7cafb000-0x7caff268]

CPU 0
  ss0        [0x7cafac00-0x7cafb000]
  stub0      [0x7caf3000-0x7caf31e8]

CPU 1
  ss1        [0x7cafa800-0x7cafac00]
  stub1      [0x7caf2c00-0x7caf2de8]

CPU 2
  ss2        [0x7cafa400-0x7cafa800]
  stub2      [0x7caf2800-0x7caf29e8]

CPU 3
  ss3        [0x7cafa000-0x7cafa400]
  stub3      [0x7caf2400-0x7caf25e8]

stacks       [0x7c800000-0x7c801000]
Loading module at 0x7cafb000 with entry 0x7cafbb88. filesize: 0x4150 memsize: 0x4268
Processing 256 relocs. Offset value of 0x7cafb000
Loading module at 0x7caf3000 with entry 0x7caf3000. filesize: 0x1e8 memsize: 0x1e8
Processing 11 relocs. Offset value of 0x7caf3000
smm_module_setup_stub: stack_top = 0x7c801000
smm_module_setup_stub: per cpu stack_size = 0x400
smm_module_setup_stub: runtime.start32_offset = 0x4c
smm_module_setup_stub: runtime.smm_size = 0x300000
SMM Module: placing smm entry code at 7caf2c00,  cpu # 0x1
SMM Module: placing smm entry code at 7caf2800,  cpu # 0x2
SMM Module: placing smm entry code at 7caf2400,  cpu # 0x3
SMM Module: stub loaded at 7caf3000. Will call 0x7cafbb88
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caeb000, cpu = 0
In relocation handler: cpu 0
New SMBASE=0x7caeb000 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caeac00, cpu = 1
In relocation handler: cpu 1
New SMBASE=0x7caeac00 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caea400, cpu = 3
In relocation handler: cpu 3
New SMBASE=0x7caea400 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caea800, cpu = 2
In relocation handler: cpu 2
New SMBASE=0x7caea800 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x206a7
CPU: AES supported
CPU: TXT supported
CPU: VT supported
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
Turbo is available but hidden
Turbo is available and visible
CPU #0 initialized
Initializing CPU #1
Initializing CPU #2
Initializing CPU #3
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x206a7
CPU: cpuid(1) 0x206a7
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
VMX status: enabled
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
cpu: energy policy set to 6
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
model_x06ax: frequency set to 2700
CPU #2 initialized
CPU #3 initialized
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x206a7
CPU: AES supported
CPU: TXT supported
CPU: VT supported
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #1 initialized
bsp_do_flight_plan done after 68 msecs.
SMI_STS: 
GPE0_STS: GPIO14 GPIO12 GPIO11 GPIO10 GPIO2 GPIO0 
ALT_GP_SMI_STS: GPI14 GPI12 GPI11 GPI10 GPI9 GPI7 GPI5 GPI4 GPI2 GPI1 GPI0 
TCO_STS: 
Locking SMM.
CPU_CLUSTER: 0 init finished in 114 msecs
PCI: 00:00.0 init
Disabling PEG12.
Disabling Device 4.
Disabling PEG60.
Disabling Device 7.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 2 msecs
PCI: 00:01.0 init
PCI: 00:01.0 init finished in 0 msecs
PCI: 00:01.1 init
PCI: 00:01.1 init finished in 0 msecs
PCI: 00:02.0 init
CBFS: 'vbt.bin' not found.
CBFS: 'pci8086,0106.rom' not found.
PCI Option ROM loading disabled for PCI: 00:02.0
GMA: locate_vbt_vbios: a031 f972 98 29 d3
GMA: VBT couldn't be found
GT Power Management Init
SNB GT2 Power Meter Weights
GT Power Management Init (post VBIOS)
framebuffer_info: bytes_per_line: 5120, bits_per_pixel: 32
                   x_res x y_res: 1280 x 800, size: 4096000 at 0x80000000
PCI: 00:02.0 init finished in 76 msecs
PCI: 00:16.0 init
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : YES
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : Host Communication
ME: Power Management Event  : Pseudo-global reset
ME: Progress Phase State    : Host communication established
ME: BIOS path: Normal
ME: me_state=0, me_state_prev=0
ME: Extend SHA-256: 0a4913fa652f26926f91c7269def4f8b4c457fc1170ada0732b1717a3f810287
ME: Firmware Version 7.0.1193.0 (code) 7.0.1193.0 (recovery)
ME Capability: Full Network manageability     : disabled
ME Capability: Regular Network manageability  : disabled
ME Capability: Manageability                  : disabled
ME Capability: Small business technology      : disabled
ME Capability: Level III manageability        : disabled
ME Capability: IntelR Anti-Theft (AT)         : disabled
ME Capability: IntelR Capability Licensing Service (CLS) : enabled
ME Capability: IntelR Power Sharing Technology (MPC) : enabled
ME Capability: ICC Over Clocking              : enabled
ME Capability: Protected Audio Video Path (PAVP) : enabled
ME Capability: IPV6                           : disabled
ME Capability: KVM Remote Control (KVM)       : disabled
ME Capability: Outbreak Containment Heuristic (OCH) : disabled
ME Capability: Virtual LAN (VLAN)             : disabled
ME Capability: TLS                            : disabled
ME Capability: Wireless LAN (WLAN)            : disabled
PCI: 00:16.0 init finished in 43 msecs
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 0 msecs
PCI: 00:1b.0 init
Azalia: base = 0x7f900000
Azalia: codec_mask = 09
azalia_audio: Initializing codec #3
azalia_audio: codec viddid: 80862805
azalia_audio: No verb!
azalia_audio: Initializing codec #0
azalia_audio: codec viddid: 10134206
azalia_audio: verb_size: 48
azalia_audio: verb not loaded.
PCI: 00:1b.0 init finished in 11 msecs
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
PCI: 00:1c.1 init
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 0 msecs
PCI: 00:1c.2 init
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 0 msecs
PCI: 00:1c.3 init
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 0 msecs
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 0 msecs
PCI: 00:1f.0 init
pch: lpc_init
PCH: detected HM65, device id: 0x1c49, rev id 0x5
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: 24 interrupts
IOAPIC: Clearing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
Set power off after power failure.
NMI sources disabled.
CougarPoint PM init
RTC: failed = 0x0
RTC Init
apm_control: Disabling ACPI.
APMC done.
pch_spi_init
PCI: 00:1f.0 init finished in 9 msecs
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: 0x7f904000
PCI: 00:1f.2 init finished in 2 msecs
PCI: 00:1f.3 init
PCI: 00:1f.3 init finished in 0 msecs
PCI: 04:00.0 init
PCI: 04:00.0 init finished in 0 msecs
PCI: 29:00.0 init
PCI: 29:00.0 init finished in 0 msecs
PCI: 29:00.1 init
PCI: 29:00.1 init finished in 0 msecs
PCI: 2a:00.0 init
PCI: 2a:00.0 init finished in 0 msecs
PCI: 2b:00.0 init
PCI: 2b:00.0 init finished in 0 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 148 / 147 ms
FMAP: area SMMSTORE found @ 630000 (262144 bytes)
smm store: 4 # blocks with size 0x10000
SMMSTORE: Setting up SMI handler
BS: BS_DEV_INIT exit times (exec / console): 0 / 3 ms
Finalize devices...
PCI: 00:1f.0 final
apm_control: Finalizing SMM.


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 bootblock starting (log level: 7)...
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: mcache @0xfeff0e00 built for 12 files, used 0x2b0 of 0x4000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0x16158 in mcache @0xfeff0e2c
BS: bootblock times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 romstage starting (log level: 7)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 620000 (65536 bytes)
Trying stored timings.
Starting Sandy Bridge RAM training (fast boot).
100MHz reference clock support: no
PLL_REF100_CFG value: 0x0
Trying CAS 9, tCK 384.
Trying CAS 7, tCK 480.
Found compatible clock, CAS pair.
Selected DRAM frequency: 533 MHz
Selected CAS latency   : 7T
MPLL busy... done in 10 us
MPLL frequency is set at : 533 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 80000000
PCI(0, 0, 0)[a4] = 0
PCI(0, 0, 0)[bc] = 7f200000
PCI(0, 0, 0)[a8] = 600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = 7c800000
PCI(0, 0, 0)[b0] = 7d200000
PCI(0, 0, 0)[b4] = 7d000000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = 7f800000
PCI(0, 0, 0)[74] = 0
PCI(0, 0, 0)[78] = ff800c00
Done memory map
Done io registers
t123: 2128, 9120, 500
ME: FWS2: 0x104e0006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x4e
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
Waited long enough, or CPU was not replaced, continue...
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x10500006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x50
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : 0x50
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1064 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00620008):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x8 dual rank, selected
   DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00000000):
   ECC inactive
   enhanced interleave mode off
   rank interleave off
   DIMMA 0 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 0x7c7ff000 254 entries.
IMD: root @ 0x7c7fec00 62 entries.
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
External stage cache:
IMD: root @ 0x7cbff000 254 entries.
IMD: root @ 0x7cbfec00 62 entries.
CBMEM entry for DIMM info: 0x7c7dc000
SMM Memory Map
SMRAM       : 0x7c800000 0x800000
 Subregion 0: 0x7c800000 0x300000
 Subregion 1: 0x7cb00000 0x100000
 Subregion 2: 0x7cc00000 0x400000
Normal boot
CBFS: Found 'fallback/postcar' @0x3c800 size 0x9024 in mcache @0xfeff0ffc
Loading module at 0x7c7cd000 with entry 0x7c7cd031. filesize: 0x88a0 memsize: 0xed08
Processing 465 relocs. Offset value of 0x7a7cd000
BS: romstage times (exec / console): total (unknown) / 52 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 postcar starting (log level: 7)...
Normal boot
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: Found 'fallback/ramstage' @0x1cac0 size 0x1c0cf in mcache @0x7c7fea1c
Loading module at 0x7c781000 with entry 0x7c781000. filesize: 0x38938 memsize: 0x4aa70
Processing 3841 relocs. Offset value of 0x78781000
BS: postcar times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 ramstage starting (log level: 7)...
Normal boot
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] enabled
PCI: 00:01.0 [8086/0101] enabled
PCI: 00:01.1 [8086/0105] enabled
PCI: 00:02.0 [8086/0126] enabled
PCI: 00:04.0 [8086/0103] disabled
PCI: 00:14.0: Disabling device
PCI: 00:16.0 [8086/1c3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1c3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1c3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1c3d] disabled No operations
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/1c20] enabled
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1 [8086/1c12] enabled
PCI: 00:1c.2 [8086/1c14] enabled
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/1c49] enabled
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1c09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1c24] disabled No operations
PCI: Leftover static devices:
PCI: 00:01.2
PCI: 00:06.0
PCI: 00:14.0
PCI: 00:19.0
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
scan_bus: bus PCI: 00:01.0 finished in 0 msecs
PCI: 00:01.1 scanning...
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 subordinate bus PCI Express
PCI: 02:00.0 [8086/1513] enabled
PCI: 02:00.0 scanning...
PCI: 02:00.0: No LTR support
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 subordinate bus PCI Express
PCI: 03:00.0 [8086/1513] enabled
PCI: 03:03.0 subordinate bus PCI Express
PCI: 03:03.0 hot-plug capable
PCI: 03:03.0 [8086/1513] enabled
PCI: 03:04.0 subordinate bus PCI Express
PCI: 03:04.0 hot-plug capable
PCI: 03:04.0 [8086/1513] enabled
PCI: 03:05.0 subordinate bus PCI Express
PCI: 03:05.0 hot-plug capable
PCI: 03:05.0 [8086/1513] enabled
PCI: 03:06.0 subordinate bus PCI Express
PCI: 03:06.0 hot-plug capable
PCI: 03:06.0 [8086/1513] enabled
PCI: 03:00.0 scanning...
PCI: 03:00.0: No LTR support
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [8086/1513] enabled
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 04:00.0: No LTR support
scan_bus: bus PCI: 03:00.0 finished in 2 msecs
PCI: 03:03.0 scanning...
PCI: 03:03.0: No LTR support
PCI: pci_scan_bus for bus 05
scan_bus: bus PCI: 03:03.0 finished in 0 msecs
PCI: 03:04.0 scanning...
PCI: 03:04.0: No LTR support
PCI: pci_scan_bus for bus 0e
scan_bus: bus PCI: 03:04.0 finished in 0 msecs
PCI: 03:05.0 scanning...
PCI: 03:05.0: No LTR support
PCI: pci_scan_bus for bus 17
scan_bus: bus PCI: 03:05.0 finished in 0 msecs
PCI: 03:06.0 scanning...
PCI: 03:06.0: No LTR support
PCI: pci_scan_bus for bus 20
scan_bus: bus PCI: 03:06.0 finished in 0 msecs
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:00.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:03.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:04.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:05.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:06.0: No LTR support
scan_bus: bus PCI: 02:00.0 finished in 25 msecs
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 02:00.0: No LTR support
scan_bus: bus PCI: 00:01.1 finished in 33 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 29
PCI: 29:00.0 [14e4/16b4] enabled
PCI: 29:00.1 [14e4/16bc] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 29:00.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 29:00.1: No LTR support
scan_bus: bus PCI: 00:1c.0 finished in 4 msecs
PCI: 00:1c.1 scanning...
PCI: pci_scan_bus for bus 2a
PCI: 2a:00.0 [14e4/4331] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 2a:00.0: No LTR support
scan_bus: bus PCI: 00:1c.1 finished in 2 msecs
PCI: 00:1c.2 scanning...
PCI: pci_scan_bus for bus 2b
PCI: 2b:00.0 [11c1/5901] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.2 finished in 2 msecs
PCI: 00:1c.3 scanning...
PCI: pci_scan_bus for bus 2c
scan_bus: bus PCI: 00:1c.3 finished in 0 msecs
PCI: 00:1f.0 scanning...
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 70 msecs
scan_bus: bus Root Device finished in 71 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 67 ms
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
TOUUD 0x100600000 TOLUD 0x7f200000 TOM 0x80000000
MEBASE 0x7f800000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x7c800000 size 8M
Available memory below 4GB: 1992M
Available memory above 4GB: 6M
Done reading resources.
=== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
   PCI: 03:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
   PCI: 03:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff done
   PCI: 03:03.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:03.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:04.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:04.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:05.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:05.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:06.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:06.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
  PCI: 02:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
   PCI: 03:03.0 1c *  [0x0 - 0x1fff] io
   PCI: 03:04.0 1c *  [0x2000 - 0x3fff] io
   PCI: 03:05.0 1c *  [0x4000 - 0x5fff] io
   PCI: 03:06.0 1c *  [0x6000 - 0x7fff] io
  PCI: 02:00.0 io: size: 8000 align: 12 gran: 12 limit: ffff done
 PCI: 00:01.1 io: size: 0 align: 12 gran: 12 limit: ffff
  PCI: 02:00.0 1c *  [0x0 - 0x7fff] io
 PCI: 00:01.1 io: size: 8000 align: 12 gran: 12 limit: ffff done
   PCI: 03:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    PCI: 04:00.0 10 *  [0x0 - 0x3ffff] mem
    PCI: 04:00.0 14 *  [0x40000 - 0x40fff] mem
   PCI: 03:00.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:03.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:03.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:04.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:04.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:05.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:05.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:06.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
  PCI: 02:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
   PCI: 03:03.0 20 *  [0x0 - 0x7fffff] mem
   PCI: 03:04.0 20 *  [0x800000 - 0xffffff] mem
   PCI: 03:05.0 20 *  [0x1000000 - 0x17fffff] mem
   PCI: 03:06.0 20 *  [0x1800000 - 0x1ffffff] mem
   PCI: 03:00.0 20 *  [0x2000000 - 0x20fffff] mem
  PCI: 02:00.0 mem: size: 2100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:01.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 02:00.0 20 *  [0x0 - 0x20fffff] mem
 PCI: 00:01.1 mem: size: 2100000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
   PCI: 03:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:03.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:03.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:04.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:04.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:05.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:05.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:06.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
  PCI: 02:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
   PCI: 03:03.0 24 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:04.0 24 *  [0x10000000 - 0x1fffffff] prefmem
   PCI: 03:05.0 24 *  [0x20000000 - 0x2fffffff] prefmem
   PCI: 03:06.0 24 *  [0x30000000 - 0x3fffffff] prefmem
  PCI: 02:00.0 prefmem: size: 40000000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:01.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  PCI: 02:00.0 24 *  [0x0 - 0x3fffffff] prefmem
 PCI: 00:01.1 prefmem: size: 40000000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  PCI: 29:00.0 10 *  [0x0 - 0xffff] prefmem
  PCI: 29:00.0 18 *  [0x10000 - 0x1ffff] prefmem
  PCI: 29:00.1 10 *  [0x20000 - 0x2ffff] prefmem
 PCI: 00:1c.0 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 2a:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 2b:00.0 10 *  [0x0 - 0xfff] mem
 PCI: 00:1c.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
 update_constraints: PCI: 00:1f.0 10000200 base 00001640 limit 0000164b io (fixed)
 update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 1000, Size: 640, Tag: 100
 * Base: 164c, Size: e9b4, Tag: 100
  PCI: 00:01.1 1c *  [0x2000 - 0x9fff] limit: 9fff io
  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
  PCI: 00:1f.2 20 *  [0x1040 - 0x105f] limit: 105f io
  PCI: 00:1f.2 10 *  [0x1060 - 0x1067] limit: 1067 io
  PCI: 00:1f.2 18 *  [0x1068 - 0x106f] limit: 106f io
  PCI: 00:1f.2 14 *  [0x1070 - 0x1073] limit: 1073 io
  PCI: 00:1f.2 1c *  [0x1074 - 0x1077] limit: 1077 io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
 update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base 00100000 limit 7c7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base 100000000 limit 1005fffff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base 7c800000 limit 7f1fffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 20000000 limit 201fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 40000000 limit 401fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base fed90000 limit fed90fff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
 update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 7f200000, Size: 70e00000, Tag: 200
 * Base: f4000000, Size: ac00000, Tag: 200
 * Base: fec01000, Size: 18f000, Tag: 200
 * Base: fed92000, Size: 26e000, Tag: 200
 * Base: 100600000, Size: effa00000, Tag: 100200
  PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
  PCI: 00:02.0 10 *  [0x7f400000 - 0x7f7fffff] limit: 7f7fffff mem
  PCI: 00:01.1 20 *  [0x90000000 - 0x920fffff] limit: 920fffff mem
  PCI: 00:1c.0 24 *  [0x7f200000 - 0x7f2fffff] limit: 7f2fffff prefmem
  PCI: 00:1c.1 20 *  [0x7f300000 - 0x7f3fffff] limit: 7f3fffff mem
  PCI: 00:1c.2 20 *  [0x7f800000 - 0x7f8fffff] limit: 7f8fffff mem
  PCI: 00:1b.0 10 *  [0x7f900000 - 0x7f903fff] limit: 7f903fff mem
  PCI: 00:1f.2 24 *  [0x7f904000 - 0x7f9047ff] limit: 7f9047ff mem
  PCI: 00:1a.0 10 *  [0x7f905000 - 0x7f9053ff] limit: 7f9053ff mem
  PCI: 00:1d.0 10 *  [0x7f906000 - 0x7f9063ff] limit: 7f9063ff mem
  PCI: 00:1f.3 10 *  [0x7f907000 - 0x7f9070ff] limit: 7f9070ff mem
  PCI: 00:16.0 10 *  [0x7f908000 - 0x7f90800f] limit: 7f90800f mem
  PCI: 00:01.1 24 *  [0x100600000 - 0x1405fffff] limit: 1405fffff prefmem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
PCI: 00:01.1 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff
 PCI: 00:01.1: Resource ranges:
 * Base: 2000, Size: 8000, Tag: 100
  PCI: 02:00.0 1c *  [0x2000 - 0x9fff] limit: 9fff io
PCI: 00:01.1 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff done
PCI: 00:01.1 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 00:01.1: Resource ranges:
 * Base: 100600000, Size: 40000000, Tag: 1200
  PCI: 02:00.0 24 *  [0x100600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 00:01.1 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 00:01.1 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff
 PCI: 00:01.1: Resource ranges:
 * Base: 90000000, Size: 2100000, Tag: 200
  PCI: 02:00.0 20 *  [0x90000000 - 0x920fffff] limit: 920fffff mem
PCI: 00:01.1 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff done
PCI: 02:00.0 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff
 PCI: 02:00.0: Resource ranges:
 * Base: 2000, Size: 8000, Tag: 100
  PCI: 03:03.0 1c *  [0x2000 - 0x3fff] limit: 3fff io
  PCI: 03:04.0 1c *  [0x4000 - 0x5fff] limit: 5fff io
  PCI: 03:05.0 1c *  [0x6000 - 0x7fff] limit: 7fff io
  PCI: 03:06.0 1c *  [0x8000 - 0x9fff] limit: 9fff io
PCI: 02:00.0 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff done
PCI: 02:00.0 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 02:00.0: Resource ranges:
 * Base: 100600000, Size: 40000000, Tag: 1200
  PCI: 03:03.0 24 *  [0x100600000 - 0x1105fffff] limit: 1105fffff prefmem
  PCI: 03:04.0 24 *  [0x110600000 - 0x1205fffff] limit: 1205fffff prefmem
  PCI: 03:05.0 24 *  [0x120600000 - 0x1305fffff] limit: 1305fffff prefmem
  PCI: 03:06.0 24 *  [0x130600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 02:00.0 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 02:00.0 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff
 PCI: 02:00.0: Resource ranges:
 * Base: 90000000, Size: 2100000, Tag: 200
  PCI: 03:03.0 20 *  [0x90000000 - 0x907fffff] limit: 907fffff mem
  PCI: 03:04.0 20 *  [0x90800000 - 0x90ffffff] limit: 90ffffff mem
  PCI: 03:05.0 20 *  [0x91000000 - 0x917fffff] limit: 917fffff mem
  PCI: 03:06.0 20 *  [0x91800000 - 0x91ffffff] limit: 91ffffff mem
  PCI: 03:00.0 20 *  [0x92000000 - 0x920fffff] limit: 920fffff mem
PCI: 02:00.0 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff done
PCI: 03:00.0 mem: base: 92000000 size: 100000 align: 20 gran: 20 limit: 920fffff
 PCI: 03:00.0: Resource ranges:
 * Base: 92000000, Size: 100000, Tag: 200
  PCI: 04:00.0 10 *  [0x92000000 - 0x9203ffff] limit: 9203ffff mem
  PCI: 04:00.0 14 *  [0x92040000 - 0x92040fff] limit: 92040fff mem
PCI: 03:00.0 mem: base: 92000000 size: 100000 align: 20 gran: 20 limit: 920fffff done
PCI: 03:03.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
 PCI: 03:03.0: Resource ranges:
 * Base: 2000, Size: 2000, Tag: 100
  NONE 18 *  [0x2000 - 0x3fff] limit: 3fff io
PCI: 03:03.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
PCI: 03:03.0 prefmem: base: 100600000 size: 10000000 align: 20 gran: 20 limit: 1105fffff
 PCI: 03:03.0: Resource ranges:
 * Base: 100600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x100600000 - 0x1105fffff] limit: 1105fffff prefmem
PCI: 03:03.0 prefmem: base: 100600000 size: 10000000 align: 20 gran: 20 limit: 1105fffff done
PCI: 03:03.0 mem: base: 90000000 size: 800000 align: 20 gran: 20 limit: 907fffff
 PCI: 03:03.0: Resource ranges:
 * Base: 90000000, Size: 800000, Tag: 200
  NONE 10 *  [0x90000000 - 0x907fffff] limit: 907fffff mem
PCI: 03:03.0 mem: base: 90000000 size: 800000 align: 20 gran: 20 limit: 907fffff done
PCI: 03:04.0 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
 PCI: 03:04.0: Resource ranges:
 * Base: 4000, Size: 2000, Tag: 100
  NONE 18 *  [0x4000 - 0x5fff] limit: 5fff io
PCI: 03:04.0 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
PCI: 03:04.0 prefmem: base: 110600000 size: 10000000 align: 20 gran: 20 limit: 1205fffff
 PCI: 03:04.0: Resource ranges:
 * Base: 110600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x110600000 - 0x1205fffff] limit: 1205fffff prefmem
PCI: 03:04.0 prefmem: base: 110600000 size: 10000000 align: 20 gran: 20 limit: 1205fffff done
PCI: 03:04.0 mem: base: 90800000 size: 800000 align: 20 gran: 20 limit: 90ffffff
 PCI: 03:04.0: Resource ranges:
 * Base: 90800000, Size: 800000, Tag: 200
  NONE 10 *  [0x90800000 - 0x90ffffff] limit: 90ffffff mem
PCI: 03:04.0 mem: base: 90800000 size: 800000 align: 20 gran: 20 limit: 90ffffff done
PCI: 03:05.0 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
 PCI: 03:05.0: Resource ranges:
 * Base: 6000, Size: 2000, Tag: 100
  NONE 18 *  [0x6000 - 0x7fff] limit: 7fff io
PCI: 03:05.0 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
PCI: 03:05.0 prefmem: base: 120600000 size: 10000000 align: 20 gran: 20 limit: 1305fffff
 PCI: 03:05.0: Resource ranges:
 * Base: 120600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x120600000 - 0x1305fffff] limit: 1305fffff prefmem
PCI: 03:05.0 prefmem: base: 120600000 size: 10000000 align: 20 gran: 20 limit: 1305fffff done
PCI: 03:05.0 mem: base: 91000000 size: 800000 align: 20 gran: 20 limit: 917fffff
 PCI: 03:05.0: Resource ranges:
 * Base: 91000000, Size: 800000, Tag: 200
  NONE 10 *  [0x91000000 - 0x917fffff] limit: 917fffff mem
PCI: 03:05.0 mem: base: 91000000 size: 800000 align: 20 gran: 20 limit: 917fffff done
PCI: 03:06.0 io: base: 8000 size: 2000 align: 12 gran: 12 limit: 9fff
 PCI: 03:06.0: Resource ranges:
 * Base: 8000, Size: 2000, Tag: 100
  NONE 18 *  [0x8000 - 0x9fff] limit: 9fff io
PCI: 03:06.0 io: base: 8000 size: 2000 align: 12 gran: 12 limit: 9fff done
PCI: 03:06.0 prefmem: base: 130600000 size: 10000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 03:06.0: Resource ranges:
 * Base: 130600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x130600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 03:06.0 prefmem: base: 130600000 size: 10000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 03:06.0 mem: base: 91800000 size: 800000 align: 20 gran: 20 limit: 91ffffff
 PCI: 03:06.0: Resource ranges:
 * Base: 91800000, Size: 800000, Tag: 200
  NONE 10 *  [0x91800000 - 0x91ffffff] limit: 91ffffff mem
PCI: 03:06.0 mem: base: 91800000 size: 800000 align: 20 gran: 20 limit: 91ffffff done
PCI: 00:1c.0 prefmem: base: 7f200000 size: 100000 align: 20 gran: 20 limit: 7f2fffff
 PCI: 00:1c.0: Resource ranges:
 * Base: 7f200000, Size: 100000, Tag: 1200
  PCI: 29:00.0 10 *  [0x7f200000 - 0x7f20ffff] limit: 7f20ffff prefmem
  PCI: 29:00.0 18 *  [0x7f210000 - 0x7f21ffff] limit: 7f21ffff prefmem
  PCI: 29:00.1 10 *  [0x7f220000 - 0x7f22ffff] limit: 7f22ffff prefmem
PCI: 00:1c.0 prefmem: base: 7f200000 size: 100000 align: 20 gran: 20 limit: 7f2fffff done
PCI: 00:1c.1 mem: base: 7f300000 size: 100000 align: 20 gran: 20 limit: 7f3fffff
 PCI: 00:1c.1: Resource ranges:
 * Base: 7f300000, Size: 100000, Tag: 200
  PCI: 2a:00.0 10 *  [0x7f300000 - 0x7f303fff] limit: 7f303fff mem
PCI: 00:1c.1 mem: base: 7f300000 size: 100000 align: 20 gran: 20 limit: 7f3fffff done
PCI: 00:1c.2 mem: base: 7f800000 size: 100000 align: 20 gran: 20 limit: 7f8fffff
 PCI: 00:1c.2: Resource ranges:
 * Base: 7f800000, Size: 100000, Tag: 200
  PCI: 2b:00.0 10 *  [0x7f800000 - 0x7f800fff] limit: 7f800fff mem
PCI: 00:1c.2 mem: base: 7f800000 size: 100000 align: 20 gran: 20 limit: 7f8fffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:01.1 1c <- [0x0000000000002000 - 0x0000000000009fff] size 0x00008000 gran 0x0c bus 02 io
PCI: 00:01.1 24 <- [0x0000000100600000 - 0x00000001405fffff] size 0x40000000 gran 0x14 bus 02 prefmem
PCI: 00:01.1 20 <- [0x0000000090000000 - 0x00000000920fffff] size 0x02100000 gran 0x14 bus 02 mem
PCI: 02:00.0 1c <- [0x0000000000002000 - 0x0000000000009fff] size 0x00008000 gran 0x0c bus 03 io
PCI: 02:00.0 24 <- [0x0000000100600000 - 0x00000001405fffff] size 0x40000000 gran 0x14 bus 03 prefmem
PCI: 02:00.0 20 <- [0x0000000090000000 - 0x00000000920fffff] size 0x02100000 gran 0x14 bus 03 mem
PCI: 03:00.0 1c <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 03:00.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 03:00.0 20 <- [0x0000000092000000 - 0x00000000920fffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 04:00.0 10 <- [0x0000000092000000 - 0x000000009203ffff] size 0x00040000 gran 0x12 mem
PCI: 04:00.0 14 <- [0x0000000092040000 - 0x0000000092040fff] size 0x00001000 gran 0x0c mem
PCI: 03:03.0 1c <- [0x0000000000002000 - 0x0000000000003fff] size 0x00002000 gran 0x0c bus 05 io
PCI: 03:03.0 24 <- [0x0000000100600000 - 0x00000001105fffff] size 0x10000000 gran 0x14 bus 05 prefmem
PCI: 03:03.0 20 <- [0x0000000090000000 - 0x00000000907fffff] size 0x00800000 gran 0x14 bus 05 mem
PCI: 03:04.0 1c <- [0x0000000000004000 - 0x0000000000005fff] size 0x00002000 gran 0x0c bus 0e io
PCI: 03:04.0 24 <- [0x0000000110600000 - 0x00000001205fffff] size 0x10000000 gran 0x14 bus 0e prefmem
PCI: 03:04.0 20 <- [0x0000000090800000 - 0x0000000090ffffff] size 0x00800000 gran 0x14 bus 0e mem
PCI: 03:05.0 1c <- [0x0000000000006000 - 0x0000000000007fff] size 0x00002000 gran 0x0c bus 17 io
PCI: 03:05.0 24 <- [0x0000000120600000 - 0x00000001305fffff] size 0x10000000 gran 0x14 bus 17 prefmem
PCI: 03:05.0 20 <- [0x0000000091000000 - 0x00000000917fffff] size 0x00800000 gran 0x14 bus 17 mem
PCI: 03:06.0 1c <- [0x0000000000008000 - 0x0000000000009fff] size 0x00002000 gran 0x0c bus 20 io
PCI: 03:06.0 24 <- [0x0000000130600000 - 0x00000001405fffff] size 0x10000000 gran 0x14 bus 20 prefmem
PCI: 03:06.0 20 <- [0x0000000091800000 - 0x0000000091ffffff] size 0x00800000 gran 0x14 bus 20 mem
PCI: 00:02.0 10 <- [0x000000007f400000 - 0x000000007f7fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x0000000080000000 - 0x000000008fffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
PCI: 00:16.0 10 <- [0x000000007f908000 - 0x000000007f90800f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x000000007f905000 - 0x000000007f9053ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x000000007f900000 - 0x000000007f903fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 29 io
PCI: 00:1c.0 24 <- [0x000000007f200000 - 0x000000007f2fffff] size 0x00100000 gran 0x14 bus 29 prefmem
PCI: 00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 29 mem
PCI: 29:00.0 10 <- [0x000000007f200000 - 0x000000007f20ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 29:00.0 18 <- [0x000000007f210000 - 0x000000007f21ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 29:00.1 10 <- [0x000000007f220000 - 0x000000007f22ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 2a io
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 2a prefmem
PCI: 00:1c.1 20 <- [0x000000007f300000 - 0x000000007f3fffff] size 0x00100000 gran 0x14 bus 2a mem
PCI: 2a:00.0 10 <- [0x000000007f300000 - 0x000000007f303fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.2 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 2b io
PCI: 00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 2b prefmem
PCI: 00:1c.2 20 <- [0x000000007f800000 - 0x000000007f8fffff] size 0x00100000 gran 0x14 bus 2b mem
PCI: 2b:00.0 10 <- [0x000000007f800000 - 0x000000007f800fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 2c io
PCI: 00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 2c prefmem
PCI: 00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 2c mem
PCI: 00:1d.0 10 <- [0x000000007f906000 - 0x000000007f9063ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.2 10 <- [0x0000000000001060 - 0x0000000000001067] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000000000001070 - 0x0000000000001073] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000000000001068 - 0x000000000000106f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000000000001074 - 0x0000000000001077] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000000000001040 - 0x000000000000105f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x000000007f904000 - 0x000000007f9047ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x000000007f907000 - 0x000000007f9070ff] size 0x00000100 gran 0x08 mem64
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 3 / 238 ms
Enabling resources...
PCI: 00:00.0 subsystem <- 106b/00de
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0013
PCI: 00:01.0 subsystem <- 106b/00de
PCI: 00:01.0 cmd <- 00
PCI: 00:01.1 bridge ctrl <- 0013
PCI: 00:01.1 subsystem <- 106b/00de
PCI: 00:01.1 cmd <- 07
PCI: 00:02.0 subsystem <- 106b/00de
PCI: 00:02.0 cmd <- 03
PCI: 00:16.0 subsystem <- 8086/7270
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 8086/7270
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 8086/7270
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 8086/7270
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0013
PCI: 00:1c.1 subsystem <- 8086/7270
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0013
PCI: 00:1c.2 subsystem <- 8086/7270
PCI: 00:1c.2 cmd <- 106
PCI: 00:1c.3 bridge ctrl <- 0013
PCI: 00:1c.3 subsystem <- 8086/7270
PCI: 00:1c.3 cmd <- 100
PCI: 00:1d.0 subsystem <- 8086/7270
PCI: 00:1d.0 cmd <- 102
PCI: 00:1f.0 subsystem <- 8086/7270
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 8086/7270
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 8086/7270
PCI: 00:1f.3 cmd <- 103
PCI: 02:00.0 bridge ctrl <- 0003
PCI: 02:00.0 cmd <- 07
PCI: 03:00.0 bridge ctrl <- 0003
PCI: 03:00.0 cmd <- 06
PCI: 03:03.0 bridge ctrl <- 0003
PCI: 03:03.0 cmd <- 07
PCI: 03:04.0 bridge ctrl <- 0003
PCI: 03:04.0 cmd <- 07
PCI: 03:05.0 bridge ctrl <- 0003
PCI: 03:05.0 cmd <- 07
PCI: 03:06.0 bridge ctrl <- 0003
PCI: 03:06.0 cmd <- 07
PCI: 04:00.0 cmd <- 06
PCI: 29:00.0 cmd <- 02
PCI: 29:00.1 cmd <- 06
PCI: 2a:00.0 cmd <- 02
PCI: 2b:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE run times (exec / console): 0 / 21 ms
Initializing devices...
CPU_CLUSTER: 0 init
MTRR: Physical address space:
0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
0x00000000000c0000 - 0x000000007c7fffff size 0x7c740000 type 6
0x000000007c800000 - 0x000000007fffffff size 0x03800000 type 0
0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 1
0x0000000090000000 - 0x00000000ffffffff size 0x70000000 type 0
0x0000000100000000 - 0x00000001005fffff size 0x00600000 type 6
0x0000000100600000 - 0x00000001405fffff size 0x40000000 type 0
apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 17/7.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x000000007c800000 mask 0x0000000fff800000 type 0
MTRR: 2 base 0x000000007d000000 mask 0x0000000fff000000 type 0
MTRR: 3 base 0x000000007e000000 mask 0x0000000ffe000000 type 0
MTRR: 4 base 0x0000000080000000 mask 0x0000000ff0000000 type 1
MTRR: 5 base 0x0000000100000000 mask 0x0000000fffc00000 type 6
MTRR: 6 base 0x0000000100400000 mask 0x0000000fffe00000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU has 2 cores, 4 threads enabled.
Setting up SMI for CPU
Will perform SMM setup.
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: Found 'cpu_microcode_blob.bin' @0x16280 size 0x6800 in mcache @0x7c7fe9ec
microcode: sig=0x206a7 pf=0x10 revision=0x2f
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
LAPIC 0x0 in XAPIC mode.
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 3 APs
Waiting for 10ms after sending INIT.
Waiting for SIPI to complete...
LAPIC 0x1 in XAPIC mode.
done.
AP: slot 1 apic_id 1, MCU rev: 0x0000002f
Waiting for SIPI to complete...
done.
LAPIC 0x3 in XAPIC mode.
LAPIC 0x2 in XAPIC mode.
AP: slot 2 apic_id 3, MCU rev: 0x0000002f
AP: slot 3 apic_id 2, MCU rev: 0x0000002f
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8
Processing 11 relocs. Offset value of 0x00038000
smm_module_setup_stub: stack_top = 0x7c801000
smm_module_setup_stub: per cpu stack_size = 0x400
smm_module_setup_stub: runtime.start32_offset = 0x4c
smm_module_setup_stub: runtime.smm_size = 0x10000
SMM Module: stub loaded at 38000. Will call 0x7c79d6a6
Installing permanent SMM handler to 0x7c800000
FX_SAVE      [0x7caff800-0x7cb00000]
HANDLER      [0x7cafb000-0x7caff268]

CPU 0
  ss0        [0x7cafac00-0x7cafb000]
  stub0      [0x7caf3000-0x7caf31e8]

CPU 1
  ss1        [0x7cafa800-0x7cafac00]
  stub1      [0x7caf2c00-0x7caf2de8]

CPU 2
  ss2        [0x7cafa400-0x7cafa800]
  stub2      [0x7caf2800-0x7caf29e8]

CPU 3
  ss3        [0x7cafa000-0x7cafa400]
  stub3      [0x7caf2400-0x7caf25e8]

stacks       [0x7c800000-0x7c801000]
Loading module at 0x7cafb000 with entry 0x7cafbb88. filesize: 0x4150 memsize: 0x4268
Processing 256 relocs. Offset value of 0x7cafb000
Loading module at 0x7caf3000 with entry 0x7caf3000. filesize: 0x1e8 memsize: 0x1e8
Processing 11 relocs. Offset value of 0x7caf3000
smm_module_setup_stub: stack_top = 0x7c801000
smm_module_setup_stub: per cpu stack_size = 0x400
smm_module_setup_stub: runtime.start32_offset = 0x4c
smm_module_setup_stub: runtime.smm_size = 0x300000
SMM Module: placing smm entry code at 7caf2c00,  cpu # 0x1
SMM Module: placing smm entry code at 7caf2800,  cpu # 0x2
SMM Module: placing smm entry code at 7caf2400,  cpu # 0x3
SMM Module: stub loaded at 7caf3000. Will call 0x7cafbb88
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caeb000, cpu = 0
In relocation handler: cpu 0
New SMBASE=0x7caeb000 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caeac00, cpu = 1
In relocation handler: cpu 1
New SMBASE=0x7caeac00 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caea400, cpu = 3
In relocation handler: cpu 3
New SMBASE=0x7caea400 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7caea800, cpu = 2
In relocation handler: cpu 2
New SMBASE=0x7caea800 IEDBASE=0x7cc00000
Writing SMRR. base = 0x7c800006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x206a7
CPU: AES supported
CPU: TXT supported
CPU: VT supported
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
Turbo is available but hidden
Turbo is available and visible
CPU #0 initialized
Initializing CPU #1
Initializing CPU #2
Initializing CPU #3
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x206a7
CPU: cpuid(1) 0x206a7
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
VMX status: enabled
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
cpu: energy policy set to 6
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
model_x06ax: frequency set to 2700
CPU #2 initialized
CPU #3 initialized
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
CPU: Intel(R) Core(TM) i7-2620M CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x206a7
CPU: AES supported
CPU: TXT supported
CPU: VT supported
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #1 initialized
bsp_do_flight_plan done after 68 msecs.
SMI_STS: 
GPE0_STS: GPIO14 GPIO12 GPIO11 GPIO10 GPIO2 GPIO0 
ALT_GP_SMI_STS: GPI14 GPI12 GPI11 GPI10 GPI9 GPI7 GPI5 GPI4 GPI2 GPI1 GPI0 
TCO_STS: 
Locking SMM.
CPU_CLUSTER: 0 init finished in 115 msecs
PCI: 00:00.0 init
Disabling PEG12.
Disabling Device 4.
Disabling PEG60.
Disabling Device 7.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 3 msecs
PCI: 00:01.0 init
PCI: 00:01.0 init finished in 0 msecs
PCI: 00:01.1 init
PCI: 00:01.1 init finished in 0 msecs
PCI: 00:02.0 init
CBFS: 'vbt.bin' not found.
CBFS: 'pci8086,0106.rom' not found.
PCI Option ROM loading disabled for PCI: 00:02.0
GMA: locate_vbt_vbios: a02d c1f2 fd b9 55
GMA: VBT couldn't be found
GT Power Management Init
SNB GT2 Power Meter Weights
GT Power Management Init (post VBIOS)
framebuffer_info: bytes_per_line: 5120, bits_per_pixel: 32
                   x_res x y_res: 1280 x 800, size: 4096000 at 0x80000000
PCI: 00:02.0 init finished in 75 msecs
PCI: 00:16.0 init
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : YES
ME: Manufacturing Mode      : YES
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : Host Communication
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Host communication established
ME: BIOS path: Normal
ME: me_state=0, me_state_prev=0
ME: Extend SHA-256: 0a4913fa652f26926f91c7269def4f8b4c457fc1170ada0732b1717a3f810287
ME: Firmware Version 7.0.1193.0 (code) 7.0.1193.0 (recovery)
ME Capability: Full Network manageability     : disabled
ME Capability: Regular Network manageability  : disabled
ME Capability: Manageability                  : disabled
ME Capability: Small business technology      : disabled
ME Capability: Level III manageability        : disabled
ME Capability: IntelR Anti-Theft (AT)         : disabled
ME Capability: IntelR Capability Licensing Service (CLS) : enabled
ME Capability: IntelR Power Sharing Technology (MPC) : enabled
ME Capability: ICC Over Clocking              : enabled
ME Capability: Protected Audio Video Path (PAVP) : enabled
ME Capability: IPV6                           : disabled
ME Capability: KVM Remote Control (KVM)       : disabled
ME Capability: Outbreak Containment Heuristic (OCH) : disabled
ME Capability: Virtual LAN (VLAN)             : disabled
ME Capability: TLS                            : disabled
ME Capability: Wireless LAN (WLAN)            : disabled
PCI: 00:16.0 init finished in 17 msecs
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 0 msecs
PCI: 00:1b.0 init
Azalia: base = 0x7f900000
Azalia: codec_mask = 09
azalia_audio: Initializing codec #3
azalia_audio: codec viddid: 80862805
azalia_audio: No verb!
azalia_audio: Initializing codec #0
azalia_audio: codec viddid: 10134206
azalia_audio: verb_size: 48
azalia_audio: verb not loaded.
PCI: 00:1b.0 init finished in 8 msecs
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
PCI: 00:1c.1 init
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 0 msecs
PCI: 00:1c.2 init
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 0 msecs
PCI: 00:1c.3 init
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 0 msecs
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 0 msecs
PCI: 00:1f.0 init
pch: lpc_init
PCH: detected HM65, device id: 0x1c49, rev id 0x5
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: 24 interrupts
IOAPIC: Clearing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
Set power off after power failure.
NMI sources disabled.
CougarPoint PM init
RTC: failed = 0x0
RTC Init
apm_control: Disabling ACPI.
APMC done.
pch_spi_init
PCI: 00:1f.0 init finished in 5 msecs
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: 0x7f904000
PCI: 00:1f.2 init finished in 1 msecs
PCI: 00:1f.3 init
PCI: 00:1f.3 init finished in 0 msecs
PCI: 04:00.0 init
PCI: 04:00.0 init finished in 0 msecs
PCI: 29:00.0 init
PCI: 29:00.0 init finished in 0 msecs
PCI: 29:00.1 init
PCI: 29:00.1 init finished in 0 msecs
PCI: 2a:00.0 init
PCI: 2a:00.0 init finished in 0 msecs
PCI: 2b:00.0 init
PCI: 2b:00.0 init finished in 0 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 132 / 112 ms
FMAP: area SMMSTORE found @ 630000 (262144 bytes)
smm store: 4 # blocks with size 0x10000
SMMSTORE: Setting up SMI handler
BS: BS_DEV_INIT exit times (exec / console): 0 / 2 ms
Finalize devices...
PCI: 00:1f.0 final
apm_control: Finalizing SMM.


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 bootblock starting (log level: 7)...
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: mcache @0xfeff0e00 built for 12 files, used 0x2b0 of 0x4000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0x16158 in mcache @0xfeff0e2c
BS: bootblock times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 romstage starting (log level: 7)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 620000 (65536 bytes)
Trying stored timings.
Starting Sandy Bridge RAM training (fast boot).
100MHz reference clock support: no
PLL_REF100_CFG value: 0x0
Trying CAS 9, tCK 384.
Trying CAS 7, tCK 480.
Found compatible clock, CAS pair.
Selected DRAM frequency: 533 MHz
Selected CAS latency   : 7T
MPLL busy... done in 10 us
MPLL frequency is set at : 533 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 80000000
PCI(0, 0, 0)[a4] = 0
PCI(0, 0, 0)[bc] = 7f200000
PCI(0, 0, 0)[a8] = 600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = 7c800000
PCI(0, 0, 0)[b0] = 7d200000
PCI(0, 0, 0)[b4] = 7d000000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = 7f800000
PCI(0, 0, 0)[74] = 0
PCI(0, 0, 0)[78] = ff800c00
Done memory map
Done io registers
t123: 2128, 9120, 500
ME: FWS2: 0x104e0006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x4e
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
Waited long enough, or CPU was not replaced, continue...
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x10500006
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x3
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x50
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : 0x50
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1064 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00620008):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x8 dual rank, selected
   DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00000000):
   ECC inactive
   enhanced interleave mode off
   rank interleave off
   DIMMA 0 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 0x7c7ff000 254 entries.
IMD: root @ 0x7c7fec00 62 entries.
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
External stage cache:
IMD: root @ 0x7cbff000 254 entries.
IMD: root @ 0x7cbfec00 62 entries.
CBMEM entry for DIMM info: 0x7c7dc000
SMM Memory Map
SMRAM       : 0x7c800000 0x800000
 Subregion 0: 0x7c800000 0x300000
 Subregion 1: 0x7cb00000 0x100000
 Subregion 2: 0x7cc00000 0x400000
Normal boot
CBFS: Found 'fallback/postcar' @0x3c800 size 0x9024 in mcache @0xfeff0ffc
Loading module at 0x7c7cd000 with entry 0x7c7cd031. filesize: 0x88a0 memsize: 0xed08
Processing 465 relocs. Offset value of 0x7a7cd000
BS: romstage times (exec / console): total (unknown) / 53 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 postcar starting (log level: 7)...
Normal boot
FMAP: area COREBOOT found @ 670200 (1637888 bytes)
CBFS: Found 'fallback/ramstage' @0x1cac0 size 0x1c0cf in mcache @0x7c7fea1c
Loading module at 0x7c781000 with entry 0x7c781000. filesize: 0x38938 memsize: 0x4aa70
Processing 3841 relocs. Offset value of 0x78781000
BS: postcar times (exec / console): total (unknown) / 4 ms


coreboot-4.19-784-g787d0bd6d1-dirty Fri Mar 10 05:06:26 UTC 2023 x86_32 ramstage starting (log level: 7)...
Normal boot
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] enabled
PCI: 00:01.0 [8086/0101] enabled
PCI: 00:01.1 [8086/0105] enabled
PCI: 00:02.0 [8086/0126] enabled
PCI: 00:04.0 [8086/0103] disabled
PCI: 00:14.0: Disabling device
PCI: 00:16.0 [8086/1c3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1c3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1c3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1c3d] disabled No operations
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/1c20] enabled
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1 [8086/1c12] enabled
PCI: 00:1c.2 [8086/1c14] enabled
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/1c49] enabled
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1c09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1c24] disabled No operations
PCI: Leftover static devices:
PCI: 00:01.2
PCI: 00:06.0
PCI: 00:14.0
PCI: 00:19.0
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
scan_bus: bus PCI: 00:01.0 finished in 0 msecs
PCI: 00:01.1 scanning...
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 subordinate bus PCI Express
PCI: 02:00.0 [8086/1513] enabled
PCI: 02:00.0 scanning...
PCI: 02:00.0: No LTR support
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 subordinate bus PCI Express
PCI: 03:00.0 [8086/1513] enabled
PCI: 03:03.0 subordinate bus PCI Express
PCI: 03:03.0 hot-plug capable
PCI: 03:03.0 [8086/1513] enabled
PCI: 03:04.0 subordinate bus PCI Express
PCI: 03:04.0 hot-plug capable
PCI: 03:04.0 [8086/1513] enabled
PCI: 03:05.0 subordinate bus PCI Express
PCI: 03:05.0 hot-plug capable
PCI: 03:05.0 [8086/1513] enabled
PCI: 03:06.0 subordinate bus PCI Express
PCI: 03:06.0 hot-plug capable
PCI: 03:06.0 [8086/1513] enabled
PCI: 03:00.0 scanning...
PCI: 03:00.0: No LTR support
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [8086/1513] enabled
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 04:00.0: No LTR support
scan_bus: bus PCI: 03:00.0 finished in 2 msecs
PCI: 03:03.0 scanning...
PCI: 03:03.0: No LTR support
PCI: pci_scan_bus for bus 05
scan_bus: bus PCI: 03:03.0 finished in 0 msecs
PCI: 03:04.0 scanning...
PCI: 03:04.0: No LTR support
PCI: pci_scan_bus for bus 0e
scan_bus: bus PCI: 03:04.0 finished in 0 msecs
PCI: 03:05.0 scanning...
PCI: 03:05.0: No LTR support
PCI: pci_scan_bus for bus 17
scan_bus: bus PCI: 03:05.0 finished in 0 msecs
PCI: 03:06.0 scanning...
PCI: 03:06.0: No LTR support
PCI: pci_scan_bus for bus 20
scan_bus: bus PCI: 03:06.0 finished in 0 msecs
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:00.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:03.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:04.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:05.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 03:06.0: No LTR support
scan_bus: bus PCI: 02:00.0 finished in 25 msecs
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
PCI: 02:00.0: No LTR support
scan_bus: bus PCI: 00:01.1 finished in 33 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 29
PCI: 29:00.0 [14e4/16b4] enabled
PCI: 29:00.1 [14e4/16bc] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 29:00.0: No LTR support
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 29:00.1: No LTR support
scan_bus: bus PCI: 00:1c.0 finished in 5 msecs
PCI: 00:1c.1 scanning...
PCI: pci_scan_bus for bus 2a
PCI: 2a:00.0 [14e4/4331] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 2a:00.0: No LTR support
scan_bus: bus PCI: 00:1c.1 finished in 2 msecs
PCI: 00:1c.2 scanning...
PCI: pci_scan_bus for bus 2b
PCI: 2b:00.0 [11c1/5901] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.2 finished in 2 msecs
PCI: 00:1c.3 scanning...
PCI: pci_scan_bus for bus 2c
scan_bus: bus PCI: 00:1c.3 finished in 0 msecs
PCI: 00:1f.0 scanning...
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 70 msecs
scan_bus: bus Root Device finished in 71 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 67 ms
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
TOUUD 0x100600000 TOLUD 0x7f200000 TOM 0x80000000
MEBASE 0x7f800000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x7c800000 size 8M
Available memory below 4GB: 1992M
Available memory above 4GB: 6M
Done reading resources.
=== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
   PCI: 03:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
   PCI: 03:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff done
   PCI: 03:03.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:03.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:04.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:04.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:05.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:05.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
   PCI: 03:06.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
    NONE 18 *  [0x0 - 0x1fff] io
   PCI: 03:06.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
  PCI: 02:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
   PCI: 03:03.0 1c *  [0x0 - 0x1fff] io
   PCI: 03:04.0 1c *  [0x2000 - 0x3fff] io
   PCI: 03:05.0 1c *  [0x4000 - 0x5fff] io
   PCI: 03:06.0 1c *  [0x6000 - 0x7fff] io
  PCI: 02:00.0 io: size: 8000 align: 12 gran: 12 limit: ffff done
 PCI: 00:01.1 io: size: 0 align: 12 gran: 12 limit: ffff
  PCI: 02:00.0 1c *  [0x0 - 0x7fff] io
 PCI: 00:01.1 io: size: 8000 align: 12 gran: 12 limit: ffff done
   PCI: 03:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    PCI: 04:00.0 10 *  [0x0 - 0x3ffff] mem
    PCI: 04:00.0 14 *  [0x40000 - 0x40fff] mem
   PCI: 03:00.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:03.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:03.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:04.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:04.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:05.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:05.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
    NONE 10 *  [0x0 - 0x7fffff] mem
   PCI: 03:06.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
  PCI: 02:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
   PCI: 03:03.0 20 *  [0x0 - 0x7fffff] mem
   PCI: 03:04.0 20 *  [0x800000 - 0xffffff] mem
   PCI: 03:05.0 20 *  [0x1000000 - 0x17fffff] mem
   PCI: 03:06.0 20 *  [0x1800000 - 0x1ffffff] mem
   PCI: 03:00.0 20 *  [0x2000000 - 0x20fffff] mem
  PCI: 02:00.0 mem: size: 2100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:01.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 02:00.0 20 *  [0x0 - 0x20fffff] mem
 PCI: 00:01.1 mem: size: 2100000 align: 20 gran: 20 limit: ffffffff done
   PCI: 03:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
   PCI: 03:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:03.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:03.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:04.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:04.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:05.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:05.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
   PCI: 03:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
    NONE 14 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:06.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
  PCI: 02:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
   PCI: 03:03.0 24 *  [0x0 - 0xfffffff] prefmem
   PCI: 03:04.0 24 *  [0x10000000 - 0x1fffffff] prefmem
   PCI: 03:05.0 24 *  [0x20000000 - 0x2fffffff] prefmem
   PCI: 03:06.0 24 *  [0x30000000 - 0x3fffffff] prefmem
  PCI: 02:00.0 prefmem: size: 40000000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:01.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  PCI: 02:00.0 24 *  [0x0 - 0x3fffffff] prefmem
 PCI: 00:01.1 prefmem: size: 40000000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  PCI: 29:00.0 10 *  [0x0 - 0xffff] prefmem
  PCI: 29:00.0 18 *  [0x10000 - 0x1ffff] prefmem
  PCI: 29:00.1 10 *  [0x20000 - 0x2ffff] prefmem
 PCI: 00:1c.0 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 2a:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 2b:00.0 10 *  [0x0 - 0xfff] mem
 PCI: 00:1c.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
 update_constraints: PCI: 00:1f.0 10000200 base 00001640 limit 0000164b io (fixed)
 update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 1000, Size: 640, Tag: 100
 * Base: 164c, Size: e9b4, Tag: 100
  PCI: 00:01.1 1c *  [0x2000 - 0x9fff] limit: 9fff io
  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
  PCI: 00:1f.2 20 *  [0x1040 - 0x105f] limit: 105f io
  PCI: 00:1f.2 10 *  [0x1060 - 0x1067] limit: 1067 io
  PCI: 00:1f.2 18 *  [0x1068 - 0x106f] limit: 106f io
  PCI: 00:1f.2 14 *  [0x1070 - 0x1073] limit: 1073 io
  PCI: 00:1f.2 1c *  [0x1074 - 0x1077] limit: 1077 io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
 update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base 00100000 limit 7c7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base 100000000 limit 1005fffff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base 7c800000 limit 7f1fffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 20000000 limit 201fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 40000000 limit 401fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base fed90000 limit fed90fff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
 update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 7f200000, Size: 70e00000, Tag: 200
 * Base: f4000000, Size: ac00000, Tag: 200
 * Base: fec01000, Size: 18f000, Tag: 200
 * Base: fed92000, Size: 26e000, Tag: 200
 * Base: 100600000, Size: effa00000, Tag: 100200
  PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
  PCI: 00:02.0 10 *  [0x7f400000 - 0x7f7fffff] limit: 7f7fffff mem
  PCI: 00:01.1 20 *  [0x90000000 - 0x920fffff] limit: 920fffff mem
  PCI: 00:1c.0 24 *  [0x7f200000 - 0x7f2fffff] limit: 7f2fffff prefmem
  PCI: 00:1c.1 20 *  [0x7f300000 - 0x7f3fffff] limit: 7f3fffff mem
  PCI: 00:1c.2 20 *  [0x7f800000 - 0x7f8fffff] limit: 7f8fffff mem
  PCI: 00:1b.0 10 *  [0x7f900000 - 0x7f903fff] limit: 7f903fff mem
  PCI: 00:1f.2 24 *  [0x7f904000 - 0x7f9047ff] limit: 7f9047ff mem
  PCI: 00:1a.0 10 *  [0x7f905000 - 0x7f9053ff] limit: 7f9053ff mem
  PCI: 00:1d.0 10 *  [0x7f906000 - 0x7f9063ff] limit: 7f9063ff mem
  PCI: 00:1f.3 10 *  [0x7f907000 - 0x7f9070ff] limit: 7f9070ff mem
  PCI: 00:16.0 10 *  [0x7f908000 - 0x7f90800f] limit: 7f90800f mem
  PCI: 00:01.1 24 *  [0x100600000 - 0x1405fffff] limit: 1405fffff prefmem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
PCI: 00:01.1 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff
 PCI: 00:01.1: Resource ranges:
 * Base: 2000, Size: 8000, Tag: 100
  PCI: 02:00.0 1c *  [0x2000 - 0x9fff] limit: 9fff io
PCI: 00:01.1 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff done
PCI: 00:01.1 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 00:01.1: Resource ranges:
 * Base: 100600000, Size: 40000000, Tag: 1200
  PCI: 02:00.0 24 *  [0x100600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 00:01.1 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 00:01.1 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff
 PCI: 00:01.1: Resource ranges:
 * Base: 90000000, Size: 2100000, Tag: 200
  PCI: 02:00.0 20 *  [0x90000000 - 0x920fffff] limit: 920fffff mem
PCI: 00:01.1 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff done
PCI: 02:00.0 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff
 PCI: 02:00.0: Resource ranges:
 * Base: 2000, Size: 8000, Tag: 100
  PCI: 03:03.0 1c *  [0x2000 - 0x3fff] limit: 3fff io
  PCI: 03:04.0 1c *  [0x4000 - 0x5fff] limit: 5fff io
  PCI: 03:05.0 1c *  [0x6000 - 0x7fff] limit: 7fff io
  PCI: 03:06.0 1c *  [0x8000 - 0x9fff] limit: 9fff io
PCI: 02:00.0 io: base: 2000 size: 8000 align: 12 gran: 12 limit: 9fff done
PCI: 02:00.0 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 02:00.0: Resource ranges:
 * Base: 100600000, Size: 40000000, Tag: 1200
  PCI: 03:03.0 24 *  [0x100600000 - 0x1105fffff] limit: 1105fffff prefmem
  PCI: 03:04.0 24 *  [0x110600000 - 0x1205fffff] limit: 1205fffff prefmem
  PCI: 03:05.0 24 *  [0x120600000 - 0x1305fffff] limit: 1305fffff prefmem
  PCI: 03:06.0 24 *  [0x130600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 02:00.0 prefmem: base: 100600000 size: 40000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 02:00.0 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff
 PCI: 02:00.0: Resource ranges:
 * Base: 90000000, Size: 2100000, Tag: 200
  PCI: 03:03.0 20 *  [0x90000000 - 0x907fffff] limit: 907fffff mem
  PCI: 03:04.0 20 *  [0x90800000 - 0x90ffffff] limit: 90ffffff mem
  PCI: 03:05.0 20 *  [0x91000000 - 0x917fffff] limit: 917fffff mem
  PCI: 03:06.0 20 *  [0x91800000 - 0x91ffffff] limit: 91ffffff mem
  PCI: 03:00.0 20 *  [0x92000000 - 0x920fffff] limit: 920fffff mem
PCI: 02:00.0 mem: base: 90000000 size: 2100000 align: 20 gran: 20 limit: 920fffff done
PCI: 03:00.0 mem: base: 92000000 size: 100000 align: 20 gran: 20 limit: 920fffff
 PCI: 03:00.0: Resource ranges:
 * Base: 92000000, Size: 100000, Tag: 200
  PCI: 04:00.0 10 *  [0x92000000 - 0x9203ffff] limit: 9203ffff mem
  PCI: 04:00.0 14 *  [0x92040000 - 0x92040fff] limit: 92040fff mem
PCI: 03:00.0 mem: base: 92000000 size: 100000 align: 20 gran: 20 limit: 920fffff done
PCI: 03:03.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
 PCI: 03:03.0: Resource ranges:
 * Base: 2000, Size: 2000, Tag: 100
  NONE 18 *  [0x2000 - 0x3fff] limit: 3fff io
PCI: 03:03.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
PCI: 03:03.0 prefmem: base: 100600000 size: 10000000 align: 20 gran: 20 limit: 1105fffff
 PCI: 03:03.0: Resource ranges:
 * Base: 100600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x100600000 - 0x1105fffff] limit: 1105fffff prefmem
PCI: 03:03.0 prefmem: base: 100600000 size: 10000000 align: 20 gran: 20 limit: 1105fffff done
PCI: 03:03.0 mem: base: 90000000 size: 800000 align: 20 gran: 20 limit: 907fffff
 PCI: 03:03.0: Resource ranges:
 * Base: 90000000, Size: 800000, Tag: 200
  NONE 10 *  [0x90000000 - 0x907fffff] limit: 907fffff mem
PCI: 03:03.0 mem: base: 90000000 size: 800000 align: 20 gran: 20 limit: 907fffff done
PCI: 03:04.0 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
 PCI: 03:04.0: Resource ranges:
 * Base: 4000, Size: 2000, Tag: 100
  NONE 18 *  [0x4000 - 0x5fff] limit: 5fff io
PCI: 03:04.0 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
PCI: 03:04.0 prefmem: base: 110600000 size: 10000000 align: 20 gran: 20 limit: 1205fffff
 PCI: 03:04.0: Resource ranges:
 * Base: 110600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x110600000 - 0x1205fffff] limit: 1205fffff prefmem
PCI: 03:04.0 prefmem: base: 110600000 size: 10000000 align: 20 gran: 20 limit: 1205fffff done
PCI: 03:04.0 mem: base: 90800000 size: 800000 align: 20 gran: 20 limit: 90ffffff
 PCI: 03:04.0: Resource ranges:
 * Base: 90800000, Size: 800000, Tag: 200
  NONE 10 *  [0x90800000 - 0x90ffffff] limit: 90ffffff mem
PCI: 03:04.0 mem: base: 90800000 size: 800000 align: 20 gran: 20 limit: 90ffffff done
PCI: 03:05.0 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
 PCI: 03:05.0: Resource ranges:
 * Base: 6000, Size: 2000, Tag: 100
  NONE 18 *  [0x6000 - 0x7fff] limit: 7fff io
PCI: 03:05.0 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
PCI: 03:05.0 prefmem: base: 120600000 size: 10000000 align: 20 gran: 20 limit: 1305fffff
 PCI: 03:05.0: Resource ranges:
 * Base: 120600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x120600000 - 0x1305fffff] limit: 1305fffff prefmem
PCI: 03:05.0 prefmem: base: 120600000 size: 10000000 align: 20 gran: 20 limit: 1305fffff done
PCI: 03:05.0 mem: base: 91000000 size: 800000 align: 20 gran: 20 limit: 917fffff
 PCI: 03:05.0: Resource ranges:
 * Base: 91000000, Size: 800000, Tag: 200
  NONE 10 *  [0x91000000 - 0x917fffff] limit: 917fffff mem
PCI: 03:05.0 mem: base: 91000000 size: 800000 align: 20 gran: 20 limit: 917fffff done
PCI: 03:06.0 io: base: 8000 size: 2000 align: 12 gran: 12 limit: 9fff
 PCI: 03:06.0: Resource ranges:
 * Base: 8000, Size: 2000, Tag: 100
  NONE 18 *  [0x8000 - 0x9fff] limit: 9fff io
PCI: 03:06.0 io: base: 8000 size: 2000 align: 12 gran: 12 limit: 9fff done
PCI: 03:06.0 prefmem: base: 130600000 size: 10000000 align: 20 gran: 20 limit: 1405fffff
 PCI: 03:06.0: Resource ranges:
 * Base: 130600000, Size: 10000000, Tag: 1200
  NONE 14 *  [0x130600000 - 0x1405fffff] limit: 1405fffff prefmem
PCI: 03:06.0 prefmem: base: 130600000 size: 10000000 align: 20 gran: 20 limit: 1405fffff done
PCI: 03:06.0 mem: base: 91800000 size: 800000 align: 20 gran: 20 limit: 91ffffff
 PCI: 03:06.0: Resource ranges:
 * Base: 91800000, Size: 800000, Tag: 200
  NONE 10 *  [0x91800000 - 0x91ffffff] limit: 91ffffff mem
PCI: 03:06.0 mem: base: 91800000 size: 800000 align: 20 gran: 20 limit: 91ffffff done
PCI: 00:1c.0 prefmem: base: 7f200000 size: 100000 align: 20 gran: 20 limit: 7f2fffff
 PCI: 00:1c.0: Resource ranges:
 * Base: 7f200000, Size: 100000, Tag: 1200
  PCI: 29:00.0 10 *  [0x7f200000 - 0x7f20ffff] limit: 7f20ffff prefmem
  PCI: 29:00.0 18 *  [0x7f210000 - 0x7f21ffff] limit: 7f21ffff prefmem
  PCI: 29:00.1 10 *  [0x7f220000 - 0x7f22ffff] limit: 7f22ffff prefmem
PCI: 00:1c.0 prefmem: base: 7f200000 size: 100000 align: 20 gran: 20 limit: 7f2fffff done
PCI: 00:1c.1 mem: base: 7f300000 size: 100000 align: 20 gran: 20 limit: 7f3fffff
 PCI: 00:1c.1: Resource ranges:
 * Base: 7f300000, Size: 100000, Tag: 200
  PCI: 2a:00.0 10 *  [0x7f300000 - 0x7f303fff] limit: 7f303fff mem
PCI: 00:1c.1 mem: base: 7f300000 size: 100000 align: 20 gran: 20 limit: 7f3fffff done
PCI: 00:1c.2 mem: base: 7f800000 size: 100000 align: 20 gran: 20 limit: 7f8fffff
 PCI: 00:1c.2: Resource ranges:
 * Base: 7f800000, Size: 100000, Tag: 200
  PCI: 2b:00.0 10 *  [0x7f800000 - 0x7f800fff] limit: 7f800fff mem
PCI: 00:1c.2 mem: base: 7f800000 size: 100000 align: 20 gran: 20 limit: 7f8fffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:01.1 1c <- [0x0000000000002000 - 0x0000000000009fff] size 0x00008000 gran 0x0c bus 02 io
PCI: 00:01.1 24 <- [0x0000000100600000 - 0x00000001405fffff] size 0x40000000 gran 0x14 bus 02 prefmem
PCI: 00:01.1 20 <- [0x0000000090000000 - 0x00000000920fffff] size 0x02100000 gran 0x14 bus 02 mem
PCI: 02:00.0 1c <- [0x0000000000002000 - 0x0000000000009fff] size 0x00008000 gran 0x0c bus 03 io
PCI: 02:00.0 24 <- [0x0000000100600000 - 0x00000001405fffff] size 0x40000000 gran 0x14 bus 03 prefmem
PCI: 02:00.0 20 <- [0x0000000090000000 - 0x00000000920fffff] size 0x02100000 gran 0x14 bus 03 mem
PCI: 03:00.0 1c <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 03:00.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 03:00.0 20 <- [0x0000000092000000 - 0x00000000920fffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 04:00.0 10 <- [0x0000000092000000 - 0x000000009203ffff] size 0x00040000 gran 0x12 mem
PCI: 04:00.0 14 <- [0x0000000092040000 - 0x0000000092040fff] size 0x00001000 gran 0x0c mem
PCI: 03:03.0 1c <- [0x0000000000002000 - 0x0000000000003fff] size 0x00002000 gran 0x0c bus 05 io
PCI: 03:03.0 24 <- [0x0000000100600000 - 0x00000001105fffff] size 0x10000000 gran 0x14 bus 05 prefmem
PCI: 03:03.0 20 <- [0x0000000090000000 - 0x00000000907fffff] size 0x00800000 gran 0x14 bus 05 mem
PCI: 03:04.0 1c <- [0x0000000000004000 - 0x0000000000005fff] size 0x00002000 gran 0x0c bus 0e io
PCI: 03:04.0 24 <- [0x0000000110600000 - 0x00000001205fffff] size 0x10000000 gran 0x14 bus 0e prefmem
PCI: 03:04.0 20 <- [0x0000000090800000 - 0x0000000090ffffff] size 0x00800000 gran 0x14 bus 0e mem
PCI: 03:05.0 1c <- [0x0000000000006000 - 0x0000000000007fff] size 0x00002000 gran 0x0c bus 17 io
PCI: 03:05.0 24 <- [0x0000000120600000 - 0x00000001305fffff] size 0x10000000 gran 0x14 bus 17 prefmem
PCI: 03:05.0 20 <- [0x0000000091000000 - 0x00000000917fffff] size 0x00800000 gran 0x14 bus 17 mem
PCI: 03:06.0 1c <- [0x0000000000008000 - 0x0000000000009fff] size 0x00002000 gran 0x0c bus 20 io
PCI: 03:06.0 24 <- [0x0000000130600000 - 0x00000001405fffff] size 0x10000000 gran 0x14 bus 20 prefmem
PCI: 03:06.0 20 <- [0x0000000091800000 - 0x0000000091ffffff] size 0x00800000 gran 0x14 bus 20 mem
PCI: 00:02.0 10 <- [0x000000007f400000 - 0x000000007f7fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x0000000080000000 - 0x000000008fffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
PCI: 00:16.0 10 <- [0x000000007f908000 - 0x000000007f90800f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x000000007f905000 - 0x000000007f9053ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x000000007f900000 - 0x000000007f903fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 29 io
PCI: 00:1c.0 24 <- [0x000000007f200000 - 0x000000007f2fffff] size 0x00100000 gran 0x14 bus 29 prefmem
PCI: 00:1c.0 20 <- [0x00000000ffffffff - 0x0