<?xml version="1.0" encoding="UTF-8"?>
<ftoolRoot version="29">
   <ProgSettings>
      <GenIntermediateFiles value="true" />
      <BuildOutputFilename value="$DestDir\outimage.bin" />
      <BuildCompactImage value="false" />
      <RegionOrder value="4321" />
      <EndManufacturingBitOverride value="false" />
      <Platform value="7" />
      <SkuType value="7" />
   </ProgSettings>
   <Chipset>
      <Region0 name="Descriptor Region">
         <RegionLength value="0x00000000" edit="true" visible="true" name="Descriptor region length" help_text="If non-zero, specifies the length of the Descriptor region." />
         <Enabled value="true" edit="false" visible="false" name="Descriptor region enabled" help_text="" />
         <DescriptorMap name="Descriptor Map">
            <NumComponents value="2" edit="true" visible="true" name="Number of Flash Components" help_text="Specifies the number of Flash components that will be installed on the target machine. Valid values are 0,1,2 - 0 causes only ME region to be built." />
            <ComponentBaseAddr value="0x03" edit="false" visible="true" name="Component Base Address" help_text="Identifies address bits [11:4] for the Component portion of the Flash Descriptor." />
            <RegionBaseAddr value="0x04" edit="false" visible="true" name="Region base address" help_text="Flash Region Base Address (FRBA). This identifies address bits [11:4] for the Region portion of the Flash Descriptor. Bits [24:12] and bits [3:0] are 0." />
            <NumMasters value="2" edit="false" visible="true" name="Number of Masters" help_text="Number Of Masters (NM). This field identifies the total number of Flash Regions. This number is 0's based." />
            <MasterBaseAddr value="0x06" edit="false" visible="true" name="Master base address" help_text="Identifies address bits [11:4] for the Master portion of the Flash Descriptor." />
            <PchStrapLength value="18" edit="false" visible="true" name="Number of PCH straps" help_text="PCH Strap Length (PSL). Identifies the 1s based number of Dwords of PCH Straps to be read, up to 255 DWs (1KB) max. A setting of all 0's indicates there are no PCH DW straps." />
            <PchBaseAddr value="0x10" edit="false" visible="true" name="PCH straps base address" help_text="Flash PCH Strap Base Address (FPSBA). This identifies address bits [11:4] for the PCH Strap portion of the Flash Descriptor. Bits [24:12] and bits [3:0] are 0. For validation purposes, the recommended FISBA is 0x10." />
            <ProcStrapLength value="1" edit="false" visible="true" name="Number of PROC straps" help_text="The number of PROC straps to be read. Valid values are 0 to 1." />
            <ProcBaseAddr value="0x20" edit="false" visible="true" name="PROC straps base address" help_text="Flash Master Base Address (FMBA). This identifies address bits [11:4] for the Master portion of the Flash Descriptor. Bits [24:12] and bits [3:0] are 0. A recommended FMBA is 20h." />
         </DescriptorMap>
         <Component name="Component Section">
            <ReadStatusFreq value="33MHz" value_list="20MHz,,33MHz,,50MHz" edit="true" visible="true" name="Read ID and Read Status clock frequency" help_text="If more that one Flash component exists, this field must be the lowest common frequency of the different components." />
            <WriteEraseFreq value="33MHz" value_list="20MHz,,33MHz,,50MHz" edit="true" visible="true" name="Write and erase clock frequency" help_text="If more that one Flash component exists, this field must be the lowest common frequency of the different components." />
            <FastReadFreq value="33MHz" value_list="20MHz,,33MHz,,50MHz" edit="true" visible="true" name="Fast read clock frequency" help_text="This field is undefined if the Fast Read Support is set to false." />
            <FastReadSupport value="true" edit="true" visible="true" name="Fast read support" help_text="Enables/disables Fast Read support." />
            <ReadFreq value="20MHz" value_list="20MHz" edit="false" visible="true" name="Read clock frequency" help_text="Sets the Flash read frequency" />
            <DensityComp1 value="8MB" value_list="512KB,,1MB,,2MB,,4MB,,8MB,,16MB" edit="true" visible="true" name="Flash component 1 density" help_text="This field identifies the size of the 1st Flash component." />
            <DensityComp2 value="8MB" value_list="512KB,,1MB,,2MB,,4MB,,8MB,,16MB" edit="true" visible="true" name="Flash component 2 density" help_text="This field identifies the size of the 2nd Flash component." />
            <DualOutputFastReadSupport value="false" edit="true" visible="true" name="Dual Output Fast Read Support" help_text="false: Not Supported. true: Dual Output Fast Read instruction is issued in all cases where the the Fast Read would have been issued." />
            <InvalidInst0 value="0" edit="true" visible="true" name="Invalid Instruction 0" help_text="Op-code for an invalid instruction that the Flash Controller should protect against chip erase. This byte should be set to 0 if there is no instruction to protect against." />
            <InvalidInst1 value="0" edit="true" visible="true" name="Invalid Instruction 1" help_text="Op-code for an invalid instruction that the Flash Controller should protect against chip erase. This byte should be set to 0 if there is no instruction to protect against." />
            <InvalidInst2 value="0" edit="true" visible="true" name="Invalid Instruction 2" help_text="Op-code for an invalid instruction that the Flash Controller should protect against chip erase. This byte should be set to 0 if there is no instruction to protect against." />
            <InvalidInst3 value="0" edit="true" visible="true" name="Invalid Instruction 3" help_text="Op-code for an invalid instruction that the Flash Controller should protect against chip erase. This byte should be set to 0 if there is no instruction to protect against." />
            <FlashPartitionBndry value="0x00000000" edit="false" visible="true" name="Flash Partition Boundary" help_text="The FPBA build settings are configurable in Build -&gt; Build Settings." />
            <LowerFlashEraseSize value="0x00000" edit="false" visible="false" name="Lower Flash Erase Size" help_text="For Asymmetric flash parts, this is the lower of the two erase sizes." />
            <UpperFlashEraseSize value="0x00000" edit="false" visible="false" name="Upper Flash Erase Size" help_text="For Asymmetric flash parts, this is the upper of the two erase sizes." />
         </Component>
         <MasterSection name="Master Access Section">
            <Master name="CPU/BIOS">
               <PciBus value="0" edit="false" visible="true" name="PCI Bus ID" help_text="" />
               <PciDevice value="0" edit="false" visible="true" name="PCI Device ID" help_text="" />
               <PciFunction value="0" edit="false" visible="true" name="PCI Function ID" help_text="" />
               <ReadAccess value="0xFF" value_list="0xFF,,0x0B,,0x1B" edit="true" visible="true" name="Read Access" help_text="0xFF = Debug/Manufacturing, 0x0B = Production, 0x1B = Production w/ access to PDR (should ONLY be used if PDR region is implemented).  Each bit corresponds to Regions [7:0]. If the bit is set, read access is granted. Flmstr1[23:16] " />
               <WriteAccess value="0xFF" value_list="0xFF,,0x0A,,0x1A" edit="true" visible="true" name="Write Access" help_text="0xFF = Debug/Manufacturing, 0x0A = Production, 0x1A = Production w/ access to PDR (should ONLY be used if PDR region is implemented).  Each bit corresponds to Regions [7:0]. If the bit is set, write access is granted. Flmstr1[31:24] " />
            </Master>
            <Master name="Manageability Engine (ME)">
               <PciBus value="0" edit="false" visible="true" name="PCI Bus ID" help_text="" />
               <PciDevice value="0" edit="false" visible="true" name="PCI Device ID" help_text="" />
               <PciFunction value="0" edit="false" visible="true" name="PCI Function ID" help_text="" />
               <ReadAccess value="0xFF" value_list="0xFF,,0x0D" edit="true" visible="true" name="Read Access" help_text="0xFF = Debug/Manufacturing, 0x0D = Production.  Each bit corresponds to Regions [7:0]. If the bit is set, read access is granted. Flmstr2[23:16]" />
               <WriteAccess value="0xFF" value_list="0xFF,,0x0C" edit="true" visible="true" name="Write Access" help_text="0xFF = Debug/Manufacturing, 0x0C = Production.  Each bit corresponds to Regions [7:0]. If the bit is set, write access is granted. Flmstr2[31:24] " />
            </Master>
            <Master name="GbE LAN">
               <PciBus value="1" edit="false" visible="true" name="PCI Bus ID" help_text="" />
               <PciDevice value="3" edit="false" visible="true" name="PCI Device ID" help_text="" />
               <PciFunction value="0" edit="false" visible="true" name="PCI Function ID" help_text="" />
               <ReadAccess value="0xFF" value_list="0xFF,,0x08" edit="true" visible="true" name="Read Access" help_text="0xFF = Debug/Manufacturing, 0x08 = Production.  Each bit corresponds to Regions [7:0]. If the bit is set, read access is granted. Flmstr3[23:16] " />
               <WriteAccess value="0xFF" value_list="0xFF,,0x08" edit="true" visible="true" name="Write Access" help_text="0xFF = Debug/Manufacturing, 0x08 = Production.  Each bit corresponds to Regions [7:0]. If the bit is set, write access is granted. Flmstr3[31:24] " />
            </Master>
         </MasterSection>
         <PchStraps name="PCH Straps">
            <PchStrap0 name="PCH Strap 0">
               <BiosBootBlockSize value="64KB" value_list="64KB,,128KB,,256KB" edit="true" visible="true" name="BIOS Boot Block Size" help_text="Sets BIOS Boot Block Size (BBBS)." />
               <DmiReqIdDisable value="false" edit="true" visible="true" name="DMI RequesterID Check Disable" help_text="The purpose is to support server environments with multiple processors where each have a different RequesterID that can each access the flash. false = DMI RequesterID Checks are enabled. true = DMI RequesterID Checks are disabled." />
               <MacSecDisable value="true" edit="false" visible="true" name="MACsec Disable" help_text="MACsec is a hop-by-hop network security solution. It provides Layer 2 encryption and authenticity/integrity protection for packets traveling between MACsec-enabled nodes of the network." />
               <LanPhyPcGp12Sel value="0 (General Purpose Output)" value_list="0 (General Purpose Output),,1 (Native mode)" edit="false" visible="true" name="LANPHYPC_GP12_SEL" help_text="0 = GPIO12 default is General Purpose (GP) output.  1 = GPIO12 is used in native mode as LANPHYPC." />
               <SmLink0Freq value="Fast Mode" value_list="80kHz,,100kHz,,250kHz,,Fast Mode" edit="false" visible="true" name="SMLink0 Frequency" help_text="The value of these bits determine the physical bus speed supported by the HW." />
               <SmBusFreq value="100kHz" value_list="80kHz,,100kHz,,250kHz,,400kHz" edit="false" visible="true" name="Intel (R) ME SMBus Frequency" help_text="The value of these bits determine the physical bus speed supported by the HW." />
               <SmLink1Freq value="100kHz" value_list="80kHz,,100kHz,,250kHz,,400kHz" edit="false" visible="true" name="SMLink1 Frequency" help_text="Sets the physical bus speed supported by the HW." />
               <SmLink1Enable value="true" edit="true" visible="true" name="SMLink1 Enable" help_text="Enables SMLink1." />
               <SmLink0Enable value="false" edit="false" visible="true" name="SMLink0 Enable" help_text="Enables SMLink0." />
               <SmBusEnable value="true" edit="true" visible="true" name="Intel (R) ME SMBus Enable" help_text="Enables Intel (R) ME SMBus." />
            </PchStrap0>
            <PchStrap2 name="PCH Strap 2">
               <SmBusAsdAddrEn value="false" edit="true" visible="true" name="Intel (R) ME SMBus ASD Address Enable (MESMASDEN)" help_text="true: Address is enabled. false: Address is disabled." />
               <SmBusAsdAddr value="0x00" edit="true" visible="true" name="Intel (R) ME SMBus ASD Address (MESMASDA)" help_text="Intel (R) ME SMBus ASD Address" />
               <SmBusMctpAddrEn value="false" edit="true" visible="true" name="Intel (R) ME SMBus MCTP Address Enable" help_text="true: Address is enabled. false: Address is disabled." />
               <SmBusMctpAddr value="0x2B" edit="true" visible="true" name="Intel (R) ME SMBus MCTP Address" help_text="This address is used by Intel (R) ME Anti-Theft Technology FW." />
               <SmBusI2cAddrEn value="false" edit="true" visible="true" name="SMBus I2C Address Enable (SMBI2CEN)" help_text="true: Address is enabled. false: Address is disabled." />
               <SmBusI2cAddr value="0x00" edit="true" visible="true" name="SMBus I2C Address (SMBI2CA)" help_text="This is for testing purposes." />
            </PchStrap2>
            <PchStrap4 name="PCH Strap 4">
               <PhyConnectivity value="00: No PHY connected" value_list="00: No PHY connected,,10: PHY on SMLink0" edit="false" visible="true" name="PHY Connectivity" help_text="Defines if PHY is connected to Intel (R) SMBus 2 segment or not." />
               <GbeSmBusAddrEn value="false" edit="false" visible="true" name="GbE MAC SMBus Address Enable" help_text="false: Disable, true: Enable." />
               <GbeSmBusAddr value="0x70" edit="true" visible="true" name="GbE MAC SMBus Address" help_text="This is the SMBus address used by SMT to accept SMBus cycles from the PHY." />
               <GbePhySmBusAddr value="0x64" edit="true" visible="true" name="GbE PHY SMBus Address" help_text="If bit 0 set, OEM programmed SmBus address is assigned to GbE PHY by chipset. This strap must be made available to ME &amp; PMC." />
            </PchStrap4>
            <PchStrap7 name="PCH Strap 7">
               <Smt1SubVidDid4ASF value="0x00000000" edit="true" visible="true" name="Intel (R) ME SMBus Subsystem Vendor &amp; Device ID for ASF2" help_text="[15:0]-Subsystem Vendor ID, [31:16]-Subsystem Device ID. The values are provided as bytes 8-9 and 10-11 of the data payload to an external master when it initiates a    Directed GET UDID Block Read Command to the Intel (R) ME SMBus1 controller's ASF2 address." />
            </PchStrap7>
            <PchStrap9 name="PCH Strap 9">
               <PCIePortConf1 value="00: 4x1 Ports 1-4 (x1)" value_list="00: 4x1 Ports 1-4 (x1),,01: 1x2, 2x1 Port 1 (x2), Port 2 (disabled), Ports 3, 4 (x1),,10: 2x2 Port 1 (x2), Port 3 (x2), Ports 2, 4 (disabled),,11: 1x4 Port 1 (x4), Ports 2-4 (disabled)" edit="true" visible="true" name="PCIe Port Configuration 1" help_text="These straps set the default value of PCIe Port Configuration 1 register covering PCIe ports 1-4." />
               <PCIePortConf2 value="00: 4x1 Ports 5-8 (x1)" value_list="00: 4x1 Ports 5-8 (x1),,01: 1x2, 2x1 Port 5 (x2), Port 6 (disabled), Ports 7, 8 (x1),,10: 2x2 Port 5 (x2), Port 7 (x2), Ports 6, 8 (disabled),,11: 1x4 Port 5 (x4), Ports 6-8 (disabled)" edit="true" visible="true" name="PCIe Port Configuration 2" help_text="These straps set the default value of the PCI Express Port Configuration 2 register covering ports 5-8." />
               <PCIeLaneReversal1 value="false" edit="true" visible="true" name="PCIe Lane Reversal 1" help_text="This bit lane reversal behavior for PCIe* Port 1 if configured as a x4 PCIe port. false = PCIe Lanes 0-3 are not reversed. true = PCIe Lanes 0-3 are reversed when Port 1 is configured as a 1x4." />
               <PCIeLaneReversal2 value="false" edit="true" visible="true" name="PCIe Lane Reversal 2" help_text="This bit lane reversal behavior for PCIe Port 5 if configured as a x4 PCIe* port. false = PCIe Lanes 4-7 are not reversed. true = PCIe Lanes 4-7 are reversed when Port 5 is configured as a 1x4." />
               <DmiLaneReversal value="false" edit="true" visible="true" name="DMI Lane Reversal" help_text="false: DMI lanes 0-3 are not reversed. true: DMI lanes 0-3 are reversed." />
               <GbePciePortSelect value="101: Port 6" value_list="000: Port 1,,001: Port 2,,010: Port 3,,011: Port 4,,100: Port 5,,101: Port 6,,110: Port 7,,111: Port 8" edit="true" visible="true" name="Intel (R) PHY PCIe Port Select (PHY_PCIEPORTSEL)" help_text="Sets the default value of the PRC.GBEPCIERPSEL register which is used to determine which PCIe port to use for GBE MAC/PHY over PCI Express communication." />
               <GbeOverPcieEn value="false" edit="false" visible="true" name="Intel (R) PHY Over PCI Express Enable (PHY_PCIE_EN)" help_text="false: GbE MAC/PHY comm. is not enabled over PCIe. true: The port selected by GBE PCIe Port Select is used for GbE MAC/PHY over PCIe comm." />
               <SubtractDecodeAgentEn value="false" edit="true" visible="true" name="Subtractive Decode Agent Enable" help_text="Set this bit to 'true' if there is a PCI bridge chip connnected to the PCH, that requires subtractive decode agent. Set to 'false' if the platform has no PCI bridge chip." />
               <PchHotSml1AlertSel value="SML1ALERT#" value_list="PCHHOT#,,SML1ALERT#" edit="true" visible="true" name="PCHHOT# or SML1ALERT# Select" help_text="This strap determines the native mode operation of GPIO74" />
            </PchStrap9>
            <PchStrap10 name="PCH Strap 10">
               <Reserved value="false" edit="true" visible="true" name="Reserved" help_text="Intel Reserved. This is an unsupported setting and must be set to false." />
               <MeDbgSmbusEmergencyModeAddr value="0x00" edit="true" visible="true" name="ME Debug SMBus Emergency Mode Address" help_text="SMBUS address used for ME Debug status writes." />
               <MeDbgSmbusEmergencyModeEn value="false" edit="true" visible="true" name="ME Debug SMBus Emergency Mode Enable" help_text="This should be set to 'true' if it is desired to capture events with the ME Debug tool. This bit should be set to 'false' for production platforms." />
               <IccBootProfile value="0" edit="true" visible="true" name="ICC Boot Profile" help_text="If ICC Boot Profile is selected by soft strap then this parameter specifies the profile number." />
               <MeResetCapture value="false" edit="true" visible="true" name="ME Reset Capture on CL_RST1#" help_text="true = ME will assert at the CL_RST1# when it resets.  false = ME does not assert." />
               <IccProfileSelBy value="true" edit="true" visible="true" name="ICC Boot Profile Selected By Soft Strap" help_text="Determines if ICC Boot Profile is specified by BIOS (via Intel (R) MEI) or by soft strap. true = Soft Strap. false = BIOS (via Intel (R) MEI)." />
               <DeepSx value="true" edit="true" visible="true" name="Deep SX Enable" help_text="Deep SX refers to two low power states that are referred to Deep S4 and Deep S5." />
               <MeDbgLanEmergencyModeEn value="false" edit="true" visible="true" name="ME Debug LAN Emergency Mode" help_text="This bit should be set to 'true' if it is desired to capture events with the ME Debug tool. This bit should be set to 'false' for production platforms." />
            </PchStrap10>
            <PchStrap11 name="PCH Strap 11">
               <SmLink1GpAddrEn value="true" edit="true" visible="true" name="SMLink1 GP Target Address Enable" help_text="true: Address is enabled. false: Address is disabled." />
               <SmLink1GpAddr value="0x4B" edit="true" visible="true" name="SMLink1 GP Target Address" help_text="SMLink1 GP Target Address." />
               <SmLink1I2cAddrEn value="true" edit="true" visible="true" name="SMLink1 I2C Target Address Enable" help_text="true: Address is enabled. false: Address is disabled." />
               <SmLink1I2cAddr value="0x4C" edit="true" visible="true" name="SMLink1 I2C Target Address" help_text="SMLink1 I2C Target Address" />
            </PchStrap11>
            <PchStrap15 name="PCH Strap 15">
               <Reserved0 value="false" edit="true" visible="true" name="Reserved0" help_text="Intel Reserved. This is an unsupported setting and must be set to false." />
               <IntLanEn value="false" edit="false" visible="true" name="Intel (R) Integrated LAN Enable" help_text="false = internal MAC is power down. true = internal MAC is powered. This should be set to true if the platform is intending to use Intel (R) Integrated LAN Solution" />
               <SlpLanGpio29Sel value="false" edit="true" visible="true" name="SLP_LAN#/GPIO29 Select" help_text="false = GPIO29 can only used only as SLP_LAN# for Intel integrated LAN solution. true = GPIO29 is available for GPIO configuration" />
               <SmLink1ThermRepSel value="false" edit="true" visible="true" name="SMLink1 Thermal Reporting Select" help_text="false = Intel ME FW will collect temperature from the processor, PCH and DIMMs. true = PCH temperature (1 byte of data) will be available for polling out on SMLink1." />
            </PchStrap15>
            <PchStrap16 name="PCH Strap 16">
               <SoftStrap16 value="0x00000000" edit="true" visible="true" name="PCH Strap 16" help_text="" />
            </PchStrap16>
            <PchStrap17 name="PCH Strap 17">
               <IcBtSoftStrp value="Full Clock Integrated Mode" value_list="Full Clock Integrated Mode,,Buffered Through Mode" edit="true" visible="true" name="BTM/FCIM Select" help_text="If PCH clock boot mode is specified by this soft strap, then this parameter specifies whether PCH clocks boot in FCIM or BTM." />
            </PchStrap17>
         </PchStraps>
         <VsccTable name="VSCC Table">
            <MeVsccDevice name="AT26DF321">
               <VendorId value="0x1F" edit="true" visible="true" name="Vendor ID" help_text="The vendor specific byte of the JEDEC ID." />
               <DeviceId0 value="0x47" edit="true" visible="true" name="Device ID 0" help_text="The first device specific byte of the JEDEC ID." />
               <DeviceId1 value="0x00" edit="true" visible="true" name="Device ID 1" help_text="The second device specific byte of the JEDEC ID." />
               <MeVsccValue value="0x20152015" edit="true" visible="true" name="VSCC register value" help_text="This entry will only add SPI flash support for Intel® Management Engine FW. Contact your BIOS vendor to ensure Host VSCC will be set for this part." />
            </MeVsccDevice>
            <MeVsccDevice name="W25Q64BV">
               <VendorId value="0xEF" edit="true" visible="true" name="Vendor ID" help_text="The vendor specific byte of the JEDEC ID." />
               <DeviceId0 value="0x40" edit="true" visible="true" name="Device ID 0" help_text="The first device specific byte of the JEDEC ID." />
               <DeviceId1 value="0x17" edit="true" visible="true" name="Device ID 1" help_text="The second device specific byte of the JEDEC ID." />
               <MeVsccValue value="0x20052005" edit="true" visible="true" name="VSCC register value" help_text="This entry will only add SPI flash support for Intel® Management Engine FW. Contact your BIOS vendor to ensure Host VSCC will be set for this part." />
            </MeVsccDevice>
         </VsccTable>
         <OemSection name="OEM Section">
            <InputFile value="" edit="true" visible="true" name="OEM Section Binary input file" help_text="The contents of this file (up to 256 bytes) are copied directly into the OEM section of the Flash Descriptor." />
         </OemSection>
      </Region0>
      <Region1 name="BIOS Region">
         <Enabled value="false" edit="false" visible="false" name="BIOS region enabled" help_text="" />
         <RegionLength value="0x00000000" edit="true" visible="true" name="BIOS region length" help_text="This is the size of the BIOS region in bytes. Set this to 0 to make the region length equal to the binary file length (rounded up to 4k). Extra space will be filled with 0xFF." />
         <InputFile value="" edit="true" visible="true" name="BIOS binary input file" help_text="This is the BIOS image binary that will be copied into this region." />
      </Region1>
      <Region3 name="GbE Region">
         <Enabled value="false" edit="false" visible="false" name="GbE region enabled" help_text="" />
         <RegionLength value="0x00000000" edit="true" visible="true" name="GbE LAN region length" help_text="This is the size of the GbE LAN region in bytes. Set this to 0 to make the region length equal to the binary file length (rounded up to 4k). Extra space will be filled with 0xFF." />
         <InputFile value="" edit="true" visible="true" name="GbE binary input file" help_text="This is the Gbe image binary that will be copied into this region." />
         <MajorVersion value="0" edit="false" visible="true" name="Major Version" help_text="" />
         <MinorVersion value="0" edit="false" visible="true" name="Minor Version" help_text="" />
         <ImageId value="0" edit="false" visible="true" name="Image ID" help_text="" />
         <LANEn value="false" edit="false" visible="true" name="Intel (R) Integrated LAN Enable" help_text="Intel (R) Integrated LAN related PCH Straps are set up automatically according to this setting." />
      </Region3>
      <Region4 name="PDR Region">
         <Enabled value="false" edit="false" visible="false" name="PDR region enabled" help_text="" />
         <RegionLength value="0x00000000" edit="true" visible="true" name="PDR region length" help_text="This is the size of the PDR region in bytes. Set this to zero and specify an input file if you want the tool to determine the appropriate size for the region." />
         <InputFile value="" edit="true" visible="true" name="PDR binary input file" help_text="This is the PDR image binary that will be copied into this region." />
      </Region4>
      <Region2 name="ME Region">
         <Enabled value="true" edit="false" visible="false" name="ME region enabled" help_text="" />
         <InputFile value="$SourceDir\outimage\decomp\me region.bin" edit="true" visible="true" name="ME Binary Input File" help_text="This is the path to a binary file that will be used for the ME region." />
         <PermitFile value="" edit="true" visible="true" name="PCH MTP Permit File" help_text="Adds the PCH MTP permit data to the ME region." />
         <CpuMtpPermitFile value="" edit="true" visible="true" name="CPU MTP Permit File" help_text="Adds the CPU MTP permit data to the ME region." />
         <RegionOffset value="0x00000000" edit="true" visible="true" name="Region Offset" help_text="The offset from the beginning of flash where the ME region will start. If 0, then FITC will determine where to put it based on the region order." />
         <RomBypassVector value="20 20 80 0F 40 00 00 10 00 00 00 00 00 00 00 00 " edit="true" visible="false" name="Rom Bypass Vector Instruction" help_text="Up to 128 bits, this field represents the instruction that is placed at the beginning of the FPT used to jump to the Rom Bypass partition." />
         <RegionLength value="0x00000000" edit="true" visible="false" name="ME region length" help_text="This is the size of the ME region in bytes. Set this to 0 to make the region length equal to the binary file length (rounded up to 4k). Extra space will be filled with 0xFF." />
         <FlashCycleLifetime value="7" edit="true" visible="false" name="Flash Cycle Lifetime" help_text="Time in years the flash should last." />
         <FlashCycleLimit value="100" edit="true" visible="false" name="Flash Cycle Limit" help_text="This number multiplied by 1000 equals the maximum number of erase cycles the flash can perform." />
         <TicksToAdd value="0x0007" edit="false" visible="false" name="Ticks to add" help_text="This is used for access management." />
         <TokensToAdd value="0x0064" edit="false" visible="false" name="Tokens to add" help_text="This is used for access management." />
         <FptHeaderVer value="0x20" edit="false" visible="false" name="FPT Header Version" help_text="Defines the FPT header type set in the FPT header." />
         <FptEntryType value="0x10" edit="false" visible="false" name="FPT Entry Type" help_text="Defines the FPT entry type set in the FPT header that defines the type of entries used in the FPT." />
         <MeLayoutType value="2" edit="false" visible="false" name="ME Layout Type" help_text="This setting reflects the layout type used after modifying the build settings." />
         <Configuration name="Configuration">
            <ME name="ME">
               <FwuOemId value="00000000-0000-0000-0000-000000000000" edit="true" visible="true" name="FW Update OEM ID" help_text="Enter UUID or file containing the UUID.  This UUID will make sure that customers can only update a platform with an image coming from the OEM of the platform.  If set to zero than any input is valid (including none) when doing a FW update." />
               <LanPowerWell value="0" value_list="0,,1,,2,,3" edit="true" visible="true" name="LAN Power Well Config" help_text="0 = Core Well, 1 = Sus Well, 2 = ME Well, 3 = SLP_LAN# (MGPIO3)" />
               <WlanPowerWell value="0x80" value_list="0x80,,0x82,,0x83,,0x85" edit="true" visible="true" name="WLAN Power Well Config" help_text="0x80 = Disabled, 0x82 = Sus Well, 0x83 = ME Well, 0x85 = WLAN Power Controlled via SLP_M# || SLP_ME_CSW_DEV#" />
               <M3PwrRailAvail value="false" edit="true" visible="true" name="M3 Power Rails Availability" help_text="false = Not Available, true = Available" />
               <HeciMeRegUnlock value="true" edit="true" visible="true" name="HECI ME Region Unlockable" help_text="Set this to TRUE if you want the ability to have BIOS write to the ME Region. Set to FALSE to opt out." />
               <SubSysVendId value="0x0000" edit="true" visible="true" name="Sub System Vendor ID" help_text="This ID allows OEMs the ability to test boards using Manufacturing Test Permits." />
               <ProcMissing value="No onboard glue logic" value_list="No onboard glue logic,,Glue logic tied to GPIO24" edit="false" visible="true" name="PROC_MISSING" help_text="This value will determine if there is glue logic present on the platform to detect a missing processor on desktop platforms." />
               <ProcEmulation value="No Emulation" value_list="No Emulation,,EMULATE Intel (R) vPro (TM) capable Processor,,EMULATE Intel (R) Core (TM) branded Processor,,EMULATE Intel (R) Celeron (R) branded Processor,,EMULATE Intel (R) Pentium (R) branded Processor" edit="true" visible="true" name="Processor Emulation" help_text="This gives the option to emulate different Intel ME FW behavior by changing the processor type on pre-production silicon. This field has no effect on production silicon." />
               <OemTag value="0x00000000" edit="true" visible="true" name="OEM Tag" help_text="An OEM identification number to describe the flash image represented by the value." />
               <HideFwUpdCtrl value="false" edit="true" visible="true" name="Hide FW Update Control" help_text="Setting this parameter to 'true' will not allow end users to 'disable' or 'password protect' the ME FW Update mechanism" />
               <DbgSiFeat value="0x00000002" edit="true" visible="true" name="Debug Si Features" help_text="Allows OEM control to enable FW features to assist with debug of the platform.  This control has no effect if used on production silicon." />
               <ProdSiFeat value="0x00000002" edit="true" visible="true" name="Prod Si Features" help_text="Allows OEM control to enable FW features to assist with production of the platform." />
            </ME>
            <ManageApp name="Manageability Application">
               <BiosSetupCapable value="false" edit="true" visible="true" name="Boot into BIOS Setup Capable" help_text="false = Not Capable, true = Capable" />
               <BiosBootCapable value="false" edit="true" visible="true" name="Pause during BIOS Boot Capable" help_text="false = Not Capable, true = Capable" />
               <BiosReflashCapable value="false" edit="true" visible="true" name="BIOS Reflash Capable" help_text="false = Not Capable, true = Capable" />
               <UsbrEhci1 value="11b Enabled" value_list="10b Disabled,,11b Enabled" edit="true" visible="true" name="USBr EHCI 1 Enabled" help_text="USBr EHCI 1 Enabled Setting." />
               <UsbrEhci2 value="10b Disabled" value_list="10b Disabled,,11b Enabled" edit="true" visible="true" name="USBr EHCI 2 Enabled" help_text="USBr EHCI 2 Enabled Setting." />
               <HostBasedSetupConfig value="true" edit="true" visible="true" name="Host Based Setup and Configuration" help_text="Enables/Disables Client Control Mode provisioning which allows for easier provisioning and configuration for Manageability Application. true = Enabled, false = Disabled" />
               <PrivacyLevel value="Default" value_list="Default,,Enhanced,,Extreme" edit="true" visible="true" name="Privacy Level" help_text="Configures ME redirection ports. Default - enables all ports, Enhanced - requires user consent for redirection, Extreme - disables redirection" />
               <MeIdleTimeout value="65535" edit="true" visible="true" name="Idle Timeout - Manageability Engine" help_text="Set ME Remote Wake on LAN time out.  Valid values are 1-65535." />
            </ManageApp>
            <PwrPkgs name="Power Packages">
               <Package2 value="false" edit="true" visible="true" name="Power Pkg 2 Supported (Mobile: ON in S0, ME Wake in S3, S4-5 (AC only))" help_text="Power Package available or not.  true = Available.  false = Not available." />
               <DefPwrPkg value="1" edit="true" visible="true" name="Default Power Package" help_text="Select the default Power Package from the available packages." />
            </PwrPkgs>
            <FeaturesSupported name="Features Supported">
               <MngFullPerm value="Yes" value_list="No,,Yes" edit="false" visible="true" name="Enable Intel (R) Standard Manageability; Disable Intel (R) AMT" help_text="Permanently disables Intel (R) AMT" />
               <ManageAppPerm value="Yes" value_list="No,,Yes" edit="true" visible="true" name="Manageability Application Permanently Disabled?" help_text="Setting this to Yes permanently disables Intel (R) AMT, Intel (R) Standard Manageability, and KVM." />
               <PavPerm value="No" value_list="No,,Yes" edit="true" visible="true" name="PAVP Permanently Disabled?" help_text="Select whether Protected Audio Video Path (PAVP) is permanently disabled." />
               <KvmPerm value="Yes" value_list="No,,Yes" edit="false" visible="true" name="KVM Permanently Disabled?" help_text="Select whether KVM is permanently disabled." />
               <TlsPerm value="Yes" value_list="No,,Yes" edit="true" visible="true" name="TLS Permanently Disabled?" help_text="Select whether TLS is permanently disabled." />
               <ATPerm value="Yes" value_list="No,,Yes" edit="true" visible="true" name="Intel (R) Anti-Theft Technology Permanently Disabled?" help_text="Select whether Intel (R) Anti-Theft Technology is permanently disabled." />
               <MeNetworkService value="Yes" value_list="No,,Yes" edit="true" visible="true" name="Intel (R) ME Network Service Permanently Disabled?" help_text="Select whether Intel (R) ME Network Service is permanently disabled." />
               <ManageAppShipState value="Disabled" value_list="Enabled,,Disabled" edit="false" visible="true" name="Manageability Application Enable/Disable" help_text="Select whether or not Manageability Application is enabled or disabled." />
            </FeaturesSupported>
            <SetupConfig name="Setup and Configuration">
               <UpgrdSrvcOdmId value="0x00000000" edit="true" visible="true" name="ODM ID used by Intel (R) Services" help_text="ID generated by or registered with Intel (R) Services web servers in order to identify the ODM/Board builder.  First of three IDs stored in flash and accessible through Intel (R) MEI interface." />
               <UpgrdSrvcSysIntId value="0x00000000" edit="true" visible="true" name="System Integrator ID used by Intel (R) Services" help_text="ID generated by or registered with Intel (R) Services web servers in order to identify the System Integrator.  Second of three IDs stored in flash and accessible through Intel (R) MEI interface." />
               <UpgrdSrvcRsvdId value="0x00000000" edit="true" visible="true" name="Reserved ID used by Intel (R) Services" help_text="Reserved ID may be used for a Reseller ID or other Intel (R) Services IDs in the future." />
               <MctpStaticEids value="0x920030" edit="true" visible="true" name="MCTP Static EIDs" help_text="Defines the ME’s 8-bits MCTP Endpoint IDs for each SMBus physical interface (SMBus, SMLink0 and SMLink1). These values are needed for FW to communicate with MCTP end points." />
               <MctpInfo3G value="0x02" edit="true" visible="true" name="MCTP Info 3G" help_text="Defines the 7-bits MCTP address of the 3G NIC card on ME SMBus. This value is needed if there is a 3G NIC card working with Intel AT." />
               <PermitTimerResolution value="Days" value_list="Days,,Minutes" edit="true" visible="true" name="Permit Period Timer Resolution" help_text="This setting determines what the permit period timer resolution will be." />
               <MebxPassPolicy value="0" value_list="0,,1,,2" edit="true" visible="true" name="MEBx Password Policy" help_text="0 = Over network password change allowed only if it is default.  1 = Over network password change allowed only during Setup and Configuration.  2 = Over network password change is always allowed." />
               <RemoteConfig value="false" edit="true" visible="true" name="Remote Configuration Enabled" help_text="false = Disable. true = Enable." />
               <PkiDnsSuffix value="" edit="true" visible="true" name="PKI DNS Suffix" help_text="Set PKI DNS Suffix in dotted string format." />
               <Hash0 name="Hash 0">
                  <Active value="false" edit="true" visible="true" name="Hash 0 Active" help_text="false = Not Active  true = Active" />
               </Hash0>
               <Hash1 name="Hash 1">
                  <Active value="false" edit="true" visible="true" name="Hash 1 Active" help_text="false = Not Active  true = Active" />
               </Hash1>
               <Hash2 name="Hash 2">
                  <Active value="false" edit="true" visible="true" name="Hash 2 Active" help_text="false = Not Active  true = Active" />
               </Hash2>
               <Hash3 name="Hash 3">
                  <Active value="false" edit="true" visible="true" name="Hash 3 Active" help_text="false = Not Active  true = Active" />
               </Hash3>
               <Hash4 name="Hash 4">
                  <Active value="false" edit="true" visible="true" name="Hash 4 Active" help_text="false = Not Active  true = Active" />
               </Hash4>
               <Hash5 name="Hash 5">
                  <Active value="false" edit="true" visible="true" name="Hash 5 Active" help_text="false = Not Active  true = Active" />
               </Hash5>
               <Hash6 name="Hash 6">
                  <Active value="false" edit="true" visible="true" name="Hash 6 Active" help_text="false = Not Active  true = Active" />
               </Hash6>
               <Hash7 name="Hash 7">
                  <Active value="false" edit="true" visible="true" name="Hash 7 Active" help_text="false = Not Active  true = Active" />
               </Hash7>
               <Hash8 name="Hash 8">
                  <Active value="false" edit="true" visible="true" name="Hash 8 Active" help_text="false = Not Active  true = Active" />
               </Hash8>
               <Hash9 name="Hash 9">
                  <Active value="false" edit="true" visible="true" name="Hash 9 Active" help_text="false = Not Active  true = Active" />
               </Hash9>
               <Hash10 name="Hash 10">
                  <Active value="false" edit="true" visible="true" name="Hash 10 Active" help_text="false = Not Active  true = Active" />
               </Hash10>
               <Hash11 name="Hash 11">
                  <Active value="false" edit="true" visible="true" name="Hash 11 Active" help_text="false = Not Active  true = Active" />
               </Hash11>
               <Hash12 name="Hash 12">
                  <Active value="false" edit="true" visible="true" name="Hash 12 Active" help_text="false = Not Active  true = Active" />
               </Hash12>
               <Hash13 name="Hash 13">
                  <Active value="false" edit="true" visible="true" name="Hash 13 Active" help_text="false = Not Active  true = Active" />
               </Hash13>
               <Hash14 name="Hash 14">
                  <Active value="false" edit="true" visible="true" name="Hash 14 Active" help_text="false = Not Active  true = Active" />
               </Hash14>
               <Hash15 name="Hash 15">
                  <Active value="false" edit="true" visible="true" name="Hash 15 Active" help_text="false = Not Active  true = Active" />
               </Hash15>
               <Hash16 name="Hash 16">
                  <Active value="false" edit="true" visible="true" name="Hash 16 Active" help_text="false = Not Active  true = Active" />
               </Hash16>
               <Hash17 name="Hash 17">
                  <Active value="false" edit="true" visible="true" name="Hash 17 Active" help_text="false = Not Active  true = Active" />
               </Hash17>
               <Hash18 name="Hash 18">
                  <Active value="false" edit="true" visible="true" name="Hash 18 Active" help_text="false = Not Active  true = Active" />
               </Hash18>
               <Hash19 name="OEM Default Certificate">
                  <Active value="false" edit="true" visible="true" name="OEM Default Certificate Active" help_text="false = Not Active  true = Active" />
                  <FriendlyName value="" edit="true" visible="true" name="OEM Default Certificate Friendly Name" help_text="Enter Hash Name.  Maximum of 32 characters." />
                  <Stream value="" edit="true" visible="true" name="OEM Default Certificate Stream" help_text="Enter raw hash string or certificate file." />
               </Hash19>
               <Hash20 name="OEM Customizable Certificate 1">
                  <Active value="false" edit="true" visible="true" name="OEM Customizable Certificate 1 Active" help_text="false = Not Active  true = Active" />
                  <FriendlyName value="" edit="true" visible="true" name="OEM Customizable Certificate 1 Friendly Name" help_text="Enter Hash Name.  Maximum of 32 characters." />
                  <Stream value="" edit="true" visible="true" name="OEM Customizable Certificate 1 Stream" help_text="Enter raw hash string or certificate file." />
               </Hash20>
               <Hash21 name="OEM Customizable Certificate 2">
                  <Active value="false" edit="true" visible="true" name="OEM Customizable Certificate 2 Active" help_text="false = Not Active  true = Active" />
                  <FriendlyName value="" edit="true" visible="true" name="OEM Customizable Certificate 2 Friendly Name" help_text="Enter Hash Name.  Maximum of 32 characters." />
                  <Stream value="" edit="true" visible="true" name="OEM Customizable Certificate 2 Stream" help_text="Enter raw hash string or certificate file." />
               </Hash21>
               <Hash22 name="OEM Customizable Certificate 3">
                  <Active value="false" edit="true" visible="true" name="OEM Customizable Certificate 3 Active" help_text="false = Not Active  true = Active" />
                  <FriendlyName value="" edit="true" visible="true" name="OEM Customizable Certificate 3 Friendly Name" help_text="Enter Hash Name.  Maximum of 32 characters." />
                  <Stream value="" edit="true" visible="true" name="OEM Customizable Certificate 3 Stream" help_text="Enter raw hash string or certificate file." />
               </Hash22>
               <Hash23 name="Hash 23">
                  <Active value="false" edit="true" visible="true" name="Hash 23 Active" help_text="false = Not Active  true = Active" />
               </Hash23>
               <Hash24 name="Hash 24">
                  <Active value="false" edit="true" visible="true" name="Hash 24 Active" help_text="false = Not Active  true = Active" />
               </Hash24>
               <Hash25 name="Hash 25">
                  <Active value="false" edit="true" visible="true" name="Hash 25 Active" help_text="false = Not Active  true = Active" />
               </Hash25>
               <Hash26 name="Hash 26">
                  <Active value="false" edit="true" visible="true" name="Hash 26 Active" help_text="false = Not Active  true = Active" />
               </Hash26>
               <Hash27 name="Hash 27">
                  <Active value="false" edit="true" visible="true" name="Hash 27 Active" help_text="false = Not Active  true = Active" />
               </Hash27>
               <Hash28 name="Hash 28">
                  <Active value="false" edit="true" visible="true" name="Hash 28 Active" help_text="false = Not Active  true = Active" />
               </Hash28>
               <Hash29 name="Hash 29">
                  <Active value="false" edit="true" visible="true" name="Hash 29 Active" help_text="false = Not Active  true = Active" />
               </Hash29>
               <Hash30 name="Hash 30">
                  <Active value="false" edit="true" visible="true" name="Hash 30 Active" help_text="false = Not Active  true = Active" />
               </Hash30>
               <Hash31 name="Hash 31">
                  <Active value="false" edit="true" visible="true" name="Hash 31 Active" help_text="false = Not Active  true = Active" />
               </Hash31>
               <Hash32 name="Hash 32">
                  <Active value="false" edit="true" visible="true" name="Hash 32 Active" help_text="false = Not Active  true = Active" />
               </Hash32>
            </SetupConfig>
            <AT name="Intel (R) Anti-Theft Technology">
               <AllowUnsignedAssertStolen value="false" edit="true" visible="true" name="Allow Unsigned Assert Stolen" help_text="true = Unsigned Assert Stolen is enabled. false = The Unsigned Assert Stolen is disabled." />
               <ATBiosRcvryTimer value="Disabled" value_list="Disabled,,Enabled" edit="true" visible="true" name="Intel (R) Anti-Theft BIOS Recovery Timer" help_text="This timer will enable a stolen platform a 30 minute window to allow a FW/BIOS reflash before the system is powered down." />
               <ATFpopHard value="Allowed When AT Not Provisioned" value_list="Always Allowed,,Allowed When AT Not Provisioned" edit="true" visible="true" name="Flash Protection Override Policy Hard" help_text="Indicates under which AT conditions it is allowed for ME to enter disabled state to allow full SPI device re-flashing when the HMRFPO is set." />
               <ATFpopSoft value="Allowed When AT Not Provisioned" value_list="Always Allowed,,Allowed When AT Not Provisioned" edit="true" visible="true" name="Flash Protection Override Policy Soft" help_text="Indicates under which AT conditions it is allowed for ME to enter disabled state via BIOS based MEI messages and allow ME only region re-flash." />
            </AT>
            <MDES name="ME Debug Event Service">
               <ErrorFilter value="All" value_list="All,,Low/High/Critical,,High/Critical,,Critical" edit="true" visible="true" name="Error Filter" help_text="Set the error filter" />
               <LoggingInterface>
                  <Network value="false" edit="true" visible="true" name="Logging Interface - Network" help_text="true = Enabled false = Disabled" />
                  <SMBus value="false" edit="true" visible="true" name="Logging Interface - SMBus" help_text="true = Enabled false = Disabled" />
                  <Flash value="false" edit="true" visible="true" name="Logging Interface - Flash" help_text="true = Enabled false = Disabled" />
                  <PRAM value="false" edit="true" visible="true" name="Logging Interface - PRAM" help_text="true = Enabled false = Disabled. If enabled no other logging interface can be enabled" />
               </LoggingInterface>
               <BufferSize value="0" edit="false" visible="true" name="Buffer Size" help_text="Set the buffer size.  If Buffer Mode is set to Blocking this must be set to 0" />
               <BufferMode value="Blocking" value_list="Blocking,,Buffered,,Delayed Flush" edit="true" visible="true" name="Buffer Mode" help_text="Select the MDES Buffer Mode." />
               <SrcIpAddr value="10.2.0.2" edit="true" visible="true" name="Source IP Address" help_text="IPv4 Source Address" />
               <DestIpAddr value="10.2.0.255" edit="true" visible="true" name="Destination IP Address" help_text="IPv4 Destination Address" />
               <MacAddr value="0C FF 17 22 FF 2D" edit="true" visible="true" name="Destination MAC Address" help_text="Enter a MAC Address for the destination" />
               <SlaveAddrEn value="false" edit="true" visible="true" name="Slave Address Enable" help_text="true = Enable false = Disable" />
               <SlaveAddr value="0x00" edit="true" visible="true" name="Slave Address" help_text="Slave Address" />
               <EventFilters>
                  <FilterGroup0 value="0x00000000" edit="true" visible="true" name="Filter Group 0" help_text="" />
                  <FilterGroup1 value="0x00000000" edit="true" visible="true" name="Filter Group 1" help_text="" />
                  <FilterGroup2 value="0x00000000" edit="true" visible="true" name="Filter Group 2" help_text="" />
                  <FilterGroup3 value="0x00000000" edit="true" visible="true" name="Filter Group 3" help_text="" />
                  <FilterGroup4 value="0x00000000" edit="true" visible="true" name="Filter Group 4" help_text="" />
                  <FilterGroup5 value="0x00000000" edit="true" visible="true" name="Filter Group 5" help_text="" />
                  <FilterGroup6 value="0x00000000" edit="true" visible="true" name="Filter Group 6" help_text="" />
                  <FilterGroup7 value="0x00000000" edit="true" visible="true" name="Filter Group 7" help_text="" />
                  <FilterGroup8 value="0x00000000" edit="true" visible="true" name="Filter Group 8" help_text="" />
                  <FilterGroup9 value="0x00000000" edit="true" visible="true" name="Filter Group 9" help_text="" />
                  <FilterGroup10 value="0x00000000" edit="true" visible="true" name="Filter Group 10" help_text="" />
                  <FilterGroup11 value="0x00000000" edit="true" visible="true" name="Filter Group 11" help_text="" />
                  <FilterGroup12 value="0x00000000" edit="true" visible="true" name="Filter Group 12" help_text="" />
                  <FilterGroup13 value="0x00000000" edit="true" visible="true" name="Filter Group 13" help_text="" />
                  <FilterGroup14 value="0x00000000" edit="true" visible="true" name="Filter Group 14" help_text="" />
                  <FilterGroup15 value="0x00000000" edit="true" visible="true" name="Filter Group 15" help_text="" />
                  <FilterGroup16 value="0x00000000" edit="true" visible="true" name="Filter Group 16" help_text="" />
                  <FilterGroup17 value="0x00000000" edit="true" visible="true" name="Filter Group 17" help_text="" />
                  <FilterGroup18 value="0x00000000" edit="true" visible="true" name="Filter Group 18" help_text="" />
                  <FilterGroup19 value="0x00000000" edit="true" visible="true" name="Filter Group 19" help_text="" />
                  <FilterGroup20 value="0x00000000" edit="true" visible="true" name="Filter Group 20" help_text="" />
                  <FilterGroup21 value="0x00000000" edit="true" visible="true" name="Filter Group 21" help_text="" />
                  <FilterGroup22 value="0x00000000" edit="true" visible="true" name="Filter Group 22" help_text="" />
                  <FilterGroup23 value="0x00000000" edit="true" visible="true" name="Filter Group 23" help_text="" />
                  <FilterGroup24 value="0x00000000" edit="true" visible="true" name="Filter Group 24" help_text="" />
                  <FilterGroup25 value="0x00000000" edit="true" visible="true" name="Filter Group 25" help_text="" />
                  <FilterGroup26 value="0x00000000" edit="true" visible="true" name="Filter Group 26" help_text="" />
                  <FilterGroup27 value="0x00000000" edit="true" visible="true" name="Filter Group 27" help_text="" />
                  <FilterGroup28 value="0x00000000" edit="true" visible="true" name="Filter Group 28" help_text="" />
                  <FilterGroup29 value="0x00000000" edit="true" visible="true" name="Filter Group 29" help_text="" />
                  <FilterGroup30 value="0x00000000" edit="true" visible="true" name="Filter Group 30" help_text="" />
                  <FilterGroup31 value="0x00000000" edit="true" visible="true" name="Filter Group 31" help_text="" />
                  <FilterGroup32 value="0x00000000" edit="true" visible="true" name="Filter Group 32" help_text="" />
                  <FilterGroup33 value="0x00000000" edit="true" visible="true" name="Filter Group 33" help_text="" />
                  <FilterGroup34 value="0x00000000" edit="true" visible="true" name="Filter Group 34" help_text="" />
                  <FilterGroup35 value="0x00000000" edit="true" visible="true" name="Filter Group 35" help_text="" />
                  <FilterGroup36 value="0x00000000" edit="true" visible="true" name="Filter Group 36" help_text="" />
                  <FilterGroup37 value="0x00000000" edit="true" visible="true" name="Filter Group 37" help_text="" />
                  <FilterGroup38 value="0x00000000" edit="true" visible="true" name="Filter Group 38" help_text="" />
                  <FilterGroup39 value="0x00000000" edit="true" visible="true" name="Filter Group 39" help_text="" />
                  <FilterGroup40 value="0x00000000" edit="true" visible="true" name="Filter Group 40" help_text="" />
                  <FilterGroup41 value="0x00000000" edit="true" visible="true" name="Filter Group 41" help_text="" />
                  <FilterGroup42 value="0x00000000" edit="true" visible="true" name="Filter Group 42" help_text="" />
                  <FilterGroup43 value="0x00000000" edit="true" visible="true" name="Filter Group 43" help_text="" />
                  <FilterGroup44 value="0x00000000" edit="true" visible="true" name="Filter Group 44" help_text="" />
                  <FilterGroup45 value="0x00000000" edit="true" visible="true" name="Filter Group 45" help_text="" />
                  <FilterGroup46 value="0x00000000" edit="true" visible="true" name="Filter Group 46" help_text="" />
                  <FilterGroup47 value="0x00000000" edit="true" visible="true" name="Filter Group 47" help_text="" />
                  <FilterGroup48 value="0x00000000" edit="true" visible="true" name="Filter Group 48" help_text="" />
                  <FilterGroup49 value="0x00000000" edit="true" visible="true" name="Filter Group 49" help_text="" />
                  <FilterGroup50 value="0x00000000" edit="true" visible="true" name="Filter Group 50" help_text="" />
                  <FilterGroup51 value="0x00000000" edit="true" visible="true" name="Filter Group 51" help_text="" />
                  <FilterGroup52 value="0x00000000" edit="true" visible="true" name="Filter Group 52" help_text="" />
                  <FilterGroup53 value="0x00000000" edit="true" visible="true" name="Filter Group 53" help_text="" />
                  <FilterGroup54 value="0x00000000" edit="true" visible="true" name="Filter Group 54" help_text="" />
                  <FilterGroup55 value="0x00000000" edit="true" visible="true" name="Filter Group 55" help_text="" />
                  <FilterGroup56 value="0x00000000" edit="true" visible="true" name="Filter Group 56" help_text="" />
                  <FilterGroup57 value="0x00000000" edit="true" visible="true" name="Filter Group 57" help_text="" />
                  <FilterGroup58 value="0x00000000" edit="true" visible="true" name="Filter Group 58" help_text="" />
                  <FilterGroup59 value="0x00000000" edit="true" visible="true" name="Filter Group 59" help_text="" />
                  <FilterGroup60 value="0x00000000" edit="true" visible="true" name="Filter Group 60" help_text="" />
                  <FilterGroup61 value="0x00000000" edit="true" visible="true" name="Filter Group 61" help_text="" />
                  <FilterGroup62 value="0x00000000" edit="true" visible="true" name="Filter Group 62" help_text="" />
                  <FilterGroup63 value="0x00000000" edit="true" visible="true" name="Filter Group 63" help_text="" />
                  <FilterGroup64 value="0x00000000" edit="true" visible="true" name="Filter Group 64" help_text="" />
                  <FilterGroup65 value="0x00000000" edit="true" visible="true" name="Filter Group 65" help_text="" />
                  <FilterGroup66 value="0x00000000" edit="true" visible="true" name="Filter Group 66" help_text="" />
                  <FilterGroup67 value="0x00000000" edit="true" visible="true" name="Filter Group 67" help_text="" />
                  <FilterGroup68 value="0x00000000" edit="true" visible="true" name="Filter Group 68" help_text="" />
                  <FilterGroup69 value="0x00000000" edit="true" visible="true" name="Filter Group 69" help_text="" />
                  <FilterGroup70 value="0x00000000" edit="true" visible="true" name="Filter Group 70" help_text="" />
                  <FilterGroup71 value="0x00000000" edit="true" visible="true" name="Filter Group 71" help_text="" />
                  <FilterGroup72 value="0x00000000" edit="true" visible="true" name="Filter Group 72" help_text="" />
                  <FilterGroup73 value="0x00000000" edit="true" visible="true" name="Filter Group 73" help_text="" />
                  <FilterGroup74 value="0x00000000" edit="true" visible="true" name="Filter Group 74" help_text="" />
                  <FilterGroup75 value="0x00000000" edit="true" visible="true" name="Filter Group 75" help_text="" />
                  <FilterGroup76 value="0x00000000" edit="true" visible="true" name="Filter Group 76" help_text="" />
                  <FilterGroup77 value="0x00000000" edit="true" visible="true" name="Filter Group 77" help_text="" />
                  <FilterGroup78 value="0x00000000" edit="true" visible="true" name="Filter Group 78" help_text="" />
                  <FilterGroup79 value="0x00000000" edit="true" visible="true" name="Filter Group 79" help_text="" />
                  <FilterGroup80 value="0x00000000" edit="true" visible="true" name="Filter Group 80" help_text="" />
                  <FilterGroup81 value="0x00000000" edit="true" visible="true" name="Filter Group 81" help_text="" />
                  <FilterGroup82 value="0x00000000" edit="true" visible="true" name="Filter Group 82" help_text="" />
                  <FilterGroup83 value="0x00000000" edit="true" visible="true" name="Filter Group 83" help_text="" />
                  <FilterGroup84 value="0x00000000" edit="true" visible="true" name="Filter Group 84" help_text="" />
                  <FilterGroup85 value="0x00000000" edit="true" visible="true" name="Filter Group 85" help_text="" />
                  <FilterGroup86 value="0x00000000" edit="true" visible="true" name="Filter Group 86" help_text="" />
                  <FilterGroup87 value="0x00000000" edit="true" visible="true" name="Filter Group 87" help_text="" />
                  <FilterGroup88 value="0x00000000" edit="true" visible="true" name="Filter Group 88" help_text="" />
                  <FilterGroup89 value="0x00000000" edit="true" visible="true" name="Filter Group 89" help_text="" />
                  <FilterGroup90 value="0x00000000" edit="true" visible="true" name="Filter Group 90" help_text="" />
                  <FilterGroup91 value="0x00000000" edit="true" visible="true" name="Filter Group 91" help_text="" />
                  <FilterGroup92 value="0x00000000" edit="true" visible="true" name="Filter Group 92" help_text="" />
                  <FilterGroup93 value="0x00000000" edit="true" visible="true" name="Filter Group 93" help_text="" />
                  <FilterGroup94 value="0x00000000" edit="true" visible="true" name="Filter Group 94" help_text="" />
                  <FilterGroup95 value="0x00000000" edit="true" visible="true" name="Filter Group 95" help_text="" />
                  <FilterGroup96 value="0x00000000" edit="true" visible="true" name="Filter Group 96" help_text="" />
                  <FilterGroup97 value="0x00000000" edit="true" visible="true" name="Filter Group 97" help_text="" />
                  <FilterGroup98 value="0x00000000" edit="true" visible="true" name="Filter Group 98" help_text="" />
                  <FilterGroup99 value="0x00000000" edit="true" visible="true" name="Filter Group 99" help_text="" />
                  <FilterGroup100 value="0x00000000" edit="true" visible="true" name="Filter Group 100" help_text="" />
                  <FilterGroup101 value="0x00000000" edit="true" visible="true" name="Filter Group 101" help_text="" />
                  <FilterGroup102 value="0x00000000" edit="true" visible="true" name="Filter Group 102" help_text="" />
                  <FilterGroup103 value="0x00000000" edit="true" visible="true" name="Filter Group 103" help_text="" />
                  <FilterGroup104 value="0x00000000" edit="true" visible="true" name="Filter Group 104" help_text="" />
                  <FilterGroup105 value="0x00000000" edit="true" visible="true" name="Filter Group 105" help_text="" />
                  <FilterGroup106 value="0x00000000" edit="true" visible="true" name="Filter Group 106" help_text="" />
                  <FilterGroup107 value="0x00000000" edit="true" visible="true" name="Filter Group 107" help_text="" />
                  <FilterGroup108 value="0x00000000" edit="true" visible="true" name="Filter Group 108" help_text="" />
                  <FilterGroup109 value="0x00000000" edit="true" visible="true" name="Filter Group 109" help_text="" />
                  <FilterGroup110 value="0x00000000" edit="true" visible="true" name="Filter Group 110" help_text="" />
                  <FilterGroup111 value="0x00000000" edit="true" visible="true" name="Filter Group 111" help_text="" />
                  <FilterGroup112 value="0x00000000" edit="true" visible="true" name="Filter Group 112" help_text="" />
                  <FilterGroup113 value="0x00000000" edit="true" visible="true" name="Filter Group 113" help_text="" />
                  <FilterGroup114 value="0x00000000" edit="true" visible="true" name="Filter Group 114" help_text="" />
                  <FilterGroup115 value="0x00000000" edit="true" visible="true" name="Filter Group 115" help_text="" />
                  <FilterGroup116 value="0x00000000" edit="true" visible="true" name="Filter Group 116" help_text="" />
                  <FilterGroup117 value="0x00000000" edit="true" visible="true" name="Filter Group 117" help_text="" />
                  <FilterGroup118 value="0x00000000" edit="true" visible="true" name="Filter Group 118" help_text="" />
                  <FilterGroup119 value="0x00000000" edit="true" visible="true" name="Filter Group 119" help_text="" />
                  <FilterGroup120 value="0x00000000" edit="true" visible="true" name="Filter Group 120" help_text="" />
                  <FilterGroup121 value="0x00000000" edit="true" visible="true" name="Filter Group 121" help_text="" />
                  <FilterGroup122 value="0x00000000" edit="true" visible="true" name="Filter Group 122" help_text="" />
                  <FilterGroup123 value="0x00000000" edit="true" visible="true" name="Filter Group 123" help_text="" />
                  <FilterGroup124 value="0x00000000" edit="true" visible="true" name="Filter Group 124" help_text="" />
                  <FilterGroup125 value="0x00000000" edit="true" visible="true" name="Filter Group 125" help_text="" />
                  <FilterGroup126 value="0x00000000" edit="true" visible="true" name="Filter Group 126" help_text="" />
                  <FilterGroup127 value="0x00000000" edit="true" visible="true" name="Filter Group 127" help_text="" />
               </EventFilters>
            </MDES>
            <IccData name="ICC Data">
               <SupportedProfiles value="2" value_list="1,,2,,3,,4,,5,,6,,7,,8" edit="true" visible="true" name="Total Number of ICC Profiles" help_text="A single image can support up to 8 clock configuration profiles (OEM Request Records). Use ICC OEM Config Select in PCH Strap 10 to indicate which one of 8 images the built SPI flash binary will boot from." />
               <ICCProfiles>
                  <ICCProfile1>
                     <FcimBtmSpecificIccRegisters>
                        <CSS value="0x00011A33" edit="true" visible="true" name="Clock Source Select" help_text="This parameter controls clock source selection for non-PCI Express* clocks." />
                        <SSS value="0x00033733" edit="true" visible="true" name="SRC Source Select" help_text="This parameter controls clock source selection for PCI Express* clocks." />
                        <PLLRCS value="0x00088CBF" edit="true" visible="true" name="PLL Reference Clock Select" help_text="This parameter controls clock source selection for PCI Express* clocks." />
                        <PLLEN value="0x8000000C" edit="true" visible="true" name="PLL Enable" help_text="This parameter controls PLL enables." />
                        <IBEN value="0x0000002F" edit="true" visible="true" name="Input Buffer Enable" help_text="This parameter controls enabling of input buffers." />
                        <DIVEN value="0x000005EB" edit="true" visible="true" name="Divider Enable" help_text="This parameter controls enabling of divider blocks." />
                        <SSCCTL value="0x00010000" edit="true" visible="true" name="SSC Control" help_text="This parameter controls spread spectrum modulation capability of SSC blocks." />
                     </FcimBtmSpecificIccRegisters>
                     <IccRegisters>
                        <FCSS value="0x00000232" edit="true" visible="true" name="Flex Clock Source Select" help_text="This parameter controls muxing to select sources for Flex Clock outputs." />
                        <DPLLAC value="0x00030E08" edit="true" visible="false" name="DPLLAC" help_text="DPLLAC" />
                        <DPLLBC value="0x00030E08" edit="true" visible="false" name="DPLLBC" help_text="DPLLBC" />
                        <DPLLABANCTL value="0x00008000" edit="true" visible="false" name="DPLLABANCTL" help_text="DPLLABANCTL" />
                        <OBEN value="0x0F1FF1FF" edit="true" visible="false" name="OBEN" help_text="This parameter has been deprecated. All functionality previously specified for this parameter is now available in OCKEN parameter." />
                        <OCKEN value="0x151F0B80" edit="true" visible="true" name="Output Clock Enable" help_text="This parameter controls enabling of output buffers." />
                        <OCKENMaskBeforePost value="0x1FFF0F8F" edit="true" visible="true" name="Output Clock Allow Enable/Disable Before POST" help_text="Output Clock Allow Enable/Disable Before POST" />
                        <OCKENMaskAfterPost value="0x1FFF0F8F" edit="true" visible="true" name="Output Clock Allow Enable/Disable After POST" help_text="Output Clock Allow Enable/Disable After POST" />
                        <PM1 value="0x0000001F" edit="true" visible="true" name="PM1 - Power Management" help_text="This parameter controls power management features of clocks." />
                        <PM2 value="0x00000000" edit="true" visible="true" name="PM2 – Power Management" help_text="This parameter controls power management features of clocks." />
                        <DBP1 value="0x00FBFBFB" edit="true" visible="false" name="DBP1" help_text="DBP1" />
                        <DBP2 value="0x0000FBFB" edit="true" visible="false" name="DBP2" help_text="DBP2" />
                        <DBP3 value="0x000000FF" edit="true" visible="false" name="DBP3" help_text="DBP3" />
                        <DBP4 value="0xBBBBBBBB" edit="true" visible="false" name="DBP4" help_text="DBP4" />
                        <DBRCOM value="0x0E11175D" edit="true" visible="false" name="DBRCOM" help_text="DBRCOM" />
                        <SEBRCOMPC value="0x00000834" edit="true" visible="false" name="SEBRCOMPC" help_text="SEBRCOMPC" />
                        <SEBP1 value="0x00009999" edit="true" visible="true" name="SEBP1" help_text="This parameter controls double/single load series resistance and slew rate for FLEX clocks." />
                        <SEBP2 value="0x00099999" edit="true" visible="true" name="SEBP2" help_text="This parameter controls double/single load series resistance and slew rate for PCI clocks. PCI Specifications 2.4 and 3.0 allow for an acceptable slew rate range of 1 - 4 V/ns. ME FW programmability allows for slew rate to be specified between 0.6 - 2 V/ns for two reasons: 1. Slew rates exceeding 2 V/ns can have adverse effects on platform EMI 2. Slew rates lower than 1 V/ns can be specified for EMI benefits, at the risk of violating PCI specification" />
                        <SEBP3 value="0x00000000" edit="true" visible="false" name="SEBP3" help_text="SEBP3" />
                        <DIVSET value="0x00455551" edit="true" visible="true" name="DIVSET" help_text="DIVSET" />
                        <DIVSET1 value="0x00000551" edit="true" visible="false" name="DIVSET1" help_text="DIVSET1" />
                        <FDCtlParms value="0x00000020" edit="true" visible="false" name="FDCtlParms" help_text="FDCtlParms" />
                        <MiscBiasParms value="0x00640004" edit="true" visible="false" name="MiscBiasParms" help_text="MiscBiasParms" />
                        <PI12BiasParms value="0x08880888" edit="true" visible="true" name="PI12BiasParms" help_text="PI12BiasParms" />
                        <PI34BiasParms value="0x08880888" edit="true" visible="false" name="PI34BiasParms" help_text="PI34BiasParms" />
                        <XCKPLLAnCtl value="0x000087C0" edit="true" visible="false" name="XCKPLLAnCtl" help_text="XCKPLLAnCtl" />
                        <XCKPLLMonSel value="0x00000000" edit="true" visible="false" name="XCKPLLMonSel" help_text="XCKPLLMonSel" />
                        <InBufBiasParms value="0x00000000" edit="true" visible="false" name="InBufBiasParms" help_text="InBufBiasParms" />
                        <XCKPLLParms value="0x15780001" edit="true" visible="false" name="XCKPLLParms" help_text="XCKPLLParms" />
                        <SSCMISC value="0x00000000" edit="true" visible="false" name="SSCMISC" help_text="SSCMISC" />
                        <SSC1PARMS value="0x1270A428" edit="true" visible="true" name="SSC1PARMS" help_text="SSC1PARMS" />
                        <SSC2PARMS value="0x12704C30" edit="true" visible="true" name="SSC2PARMS" help_text="SSC2PARMS" />
                        <SSC3PARMS value="0x12704C30" edit="true" visible="true" name="SSC3PARMS" help_text="SSC3PARMS" />
                        <SSC4PARMS value="0x1270A428" edit="true" visible="true" name="SSC4PARMS" help_text="SSC4PARMS" />
                        <SSC1OCPARMS value="0x00000000" edit="true" visible="false" name="SSC1OCPARMS" help_text="SSC1OCPARMS" />
                        <SSC2OCPARMS value="0x00000000" edit="true" visible="true" name="SSC2OCPARMS" help_text="SSC2OCPARMS" />
                        <SSC3OCPARMS value="0x00000000" edit="true" visible="false" name="SSC3OCPARMS" help_text="SSC3OCPARMS" />
                        <SSC4OCPARMS value="0x00000000" edit="true" visible="false" name="SSC4OCPARMS" help_text="SSC4OCPARMS" />
                        <SSC1_2AuxPARMS value="0x29C529C5" edit="true" visible="false" name="SSC1and2AuxPARMS" help_text="SSC1and2AuxPARMS" />
                        <SSC3_4AuxPARMS value="0x29C529C5" edit="true" visible="false" name="SSC3and4AuxPARMS" help_text="SSC3and4AuxPARMS" />
                        <PMSRCCLK1 value="0x76543210" edit="true" visible="true" name="PMSRCCLK1" help_text="This parameter as signs dynamic CLKRQ# control of SRC clocks." />
                        <PMSRCCLK2 value="0x011F0F98" edit="true" visible="true" name="PMSRCCLK2" help_text="This parameter assigns dynamic CLKRQ# control of SRC clocks." />
                        <ICCSSBV value="0x00000000" edit="true" visible="false" name="ICCSSBV" help_text="ICCSSBV" />
                        <ICCTMR value="0x00000000" edit="true" visible="false" name="ICCTMR" help_text="Integrated Clock Controller Timer" />
                     </IccRegisters>
                     <ClkRngDefRecord1>
                        <Clock1 name="120/27 MHz Graphics Clock (DIV1-S)">
                           <ClkDivMin value="0x0A00" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0A00" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="false" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="50" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x100" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock1>
                        <Clock2 name="Processor or Platform DMICLK (DIV2-S)">
                           <ClkDivMin value="0x0BF2" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0C0E" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="true" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="50" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x0DF" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock2>
                        <Clock3 name="PCH DMICLK (DIV3)">
                           <ClkDivMin value="0x0C00" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0C0E" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="true" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="50" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x000" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock3>
                        <Clock4 name="120 MHz SSSC Graphics Clock (DIV4)">
                           <ClkDivMin value="0x09F2" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0A0E" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="true" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="250" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x200" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock4>
                     </ClkRngDefRecord1>
                  </ICCProfile1>
                  <ICCProfile2>
                     <FcimBtmSpecificIccRegisters>
                        <CSS value="0x00011A34" edit="true" visible="true" name="Clock Source Select" help_text="This parameter controls clock source selection for non-PCI Express* clocks." />
                        <SSS value="0x00133734" edit="true" visible="true" name="SRC Source Select" help_text="This parameter controls clock source selection for PCI Express* clocks." />
                        <PLLRCS value="0x000A8CBE" edit="true" visible="true" name="PLL Reference Clock Select" help_text="This parameter controls clock source selection for PCI Express* clocks." />
                        <PLLEN value="0x8000000C" edit="true" visible="true" name="PLL Enable" help_text="This parameter controls PLL enables." />
                        <IBEN value="0x0000002F" edit="true" visible="true" name="Input Buffer Enable" help_text="This parameter controls enabling of input buffers." />
                        <DIVEN value="0x000005FF" edit="true" visible="true" name="Divider Enable" help_text="This parameter controls enabling of divider blocks." />
                        <SSCCTL value="0x00000000" edit="true" visible="true" name="SSC Control" help_text="This parameter controls spread spectrum modulation capability of SSC blocks." />
                     </FcimBtmSpecificIccRegisters>
                     <IccRegisters>
                        <FCSS value="0x00000232" edit="true" visible="true" name="Flex Clock Source Select" help_text="This parameter controls muxing to select sources for Flex Clock outputs." />
                        <DPLLAC value="0x00030E08" edit="true" visible="false" name="DPLLAC" help_text="DPLLAC" />
                        <DPLLBC value="0x00030E08" edit="true" visible="false" name="DPLLBC" help_text="DPLLBC" />
                        <DPLLABANCTL value="0x00008000" edit="true" visible="false" name="DPLLABANCTL" help_text="DPLLABANCTL" />
                        <OBEN value="0x0F1FF1FF" edit="true" visible="false" name="OBEN" help_text="This parameter has been deprecated. All functionality previously specified for this parameter is now available in OCKEN parameter." />
                        <OCKEN value="0x151F0B80" edit="true" visible="true" name="Output Clock Enable" help_text="This parameter controls enabling of output buffers." />
                        <OCKENMaskBeforePost value="0x1FFF0F8F" edit="true" visible="true" name="Output Clock Allow Enable/Disable Before POST" help_text="Output Clock Allow Enable/Disable Before POST" />
                        <OCKENMaskAfterPost value="0x1FFF0F8F" edit="true" visible="true" name="Output Clock Allow Enable/Disable After POST" help_text="Output Clock Allow Enable/Disable After POST" />
                        <PM1 value="0x0000001F" edit="true" visible="true" name="PM1 - Power Management" help_text="This parameter controls power management features of clocks." />
                        <PM2 value="0x00000000" edit="true" visible="true" name="PM2 – Power Management" help_text="This parameter controls power management features of clocks." />
                        <DBP1 value="0x00FBFBFB" edit="true" visible="false" name="DBP1" help_text="DBP1" />
                        <DBP2 value="0x0000FBFB" edit="true" visible="false" name="DBP2" help_text="DBP2" />
                        <DBP3 value="0x000000FF" edit="true" visible="false" name="DBP3" help_text="DBP3" />
                        <DBP4 value="0xBBBBBBBB" edit="true" visible="false" name="DBP4" help_text="DBP4" />
                        <DBRCOM value="0x0E11175D" edit="true" visible="false" name="DBRCOM" help_text="DBRCOM" />
                        <SEBRCOMPC value="0x00000834" edit="true" visible="false" name="SEBRCOMPC" help_text="SEBRCOMPC" />
                        <SEBP1 value="0x00009999" edit="true" visible="true" name="SEBP1" help_text="This parameter controls double/single load series resistance and slew rate for FLEX clocks." />
                        <SEBP2 value="0x00099999" edit="true" visible="true" name="SEBP2" help_text="This parameter controls double/single load series resistance and slew rate for PCI clocks. PCI Specifications 2.4 and 3.0 allow for an acceptable slew rate range of 1 - 4 V/ns. ME FW programmability allows for slew rate to be specified between 0.6 - 2 V/ns for two reasons: 1. Slew rates exceeding 2 V/ns can have adverse effects on platform EMI 2. Slew rates lower than 1 V/ns can be specified for EMI benefits, at the risk of violating PCI specification" />
                        <SEBP3 value="0x00000000" edit="true" visible="false" name="SEBP3" help_text="SEBP3" />
                        <DIVSET value="0x00455551" edit="true" visible="true" name="DIVSET" help_text="DIVSET" />
                        <DIVSET1 value="0x00000551" edit="true" visible="false" name="DIVSET1" help_text="DIVSET1" />
                        <FDCtlParms value="0x00000020" edit="true" visible="false" name="FDCtlParms" help_text="FDCtlParms" />
                        <MiscBiasParms value="0x00640004" edit="true" visible="false" name="MiscBiasParms" help_text="MiscBiasParms" />
                        <PI12BiasParms value="0x08880888" edit="true" visible="true" name="PI12BiasParms" help_text="PI12BiasParms" />
                        <PI34BiasParms value="0x08880888" edit="true" visible="false" name="PI34BiasParms" help_text="PI34BiasParms" />
                        <XCKPLLAnCtl value="0x000087C0" edit="true" visible="false" name="XCKPLLAnCtl" help_text="XCKPLLAnCtl" />
                        <XCKPLLMonSel value="0x00000000" edit="true" visible="false" name="XCKPLLMonSel" help_text="XCKPLLMonSel" />
                        <InBufBiasParms value="0x00000000" edit="true" visible="false" name="InBufBiasParms" help_text="InBufBiasParms" />
                        <XCKPLLParms value="0x15780001" edit="true" visible="false" name="XCKPLLParms" help_text="XCKPLLParms" />
                        <SSCMISC value="0x00000000" edit="true" visible="false" name="SSCMISC" help_text="SSCMISC" />
                        <SSC1PARMS value="0x1270A428" edit="true" visible="true" name="SSC1PARMS" help_text="SSC1PARMS" />
                        <SSC2PARMS value="0x12704C30" edit="true" visible="true" name="SSC2PARMS" help_text="SSC2PARMS" />
                        <SSC3PARMS value="0x12704C30" edit="true" visible="true" name="SSC3PARMS" help_text="SSC3PARMS" />
                        <SSC4PARMS value="0x1270A428" edit="true" visible="true" name="SSC4PARMS" help_text="SSC4PARMS" />
                        <SSC1OCPARMS value="0x00000000" edit="true" visible="false" name="SSC1OCPARMS" help_text="SSC1OCPARMS" />
                        <SSC2OCPARMS value="0x00000000" edit="true" visible="true" name="SSC2OCPARMS" help_text="SSC2OCPARMS" />
                        <SSC3OCPARMS value="0x00000000" edit="true" visible="false" name="SSC3OCPARMS" help_text="SSC3OCPARMS" />
                        <SSC4OCPARMS value="0x00000000" edit="true" visible="false" name="SSC4OCPARMS" help_text="SSC4OCPARMS" />
                        <SSC1_2AuxPARMS value="0x29C529C5" edit="true" visible="false" name="SSC1and2AuxPARMS" help_text="SSC1and2AuxPARMS" />
                        <SSC3_4AuxPARMS value="0x29C529C5" edit="true" visible="false" name="SSC3and4AuxPARMS" help_text="SSC3and4AuxPARMS" />
                        <PMSRCCLK1 value="0x76543210" edit="true" visible="true" name="PMSRCCLK1" help_text="This parameter as signs dynamic CLKRQ# control of SRC clocks." />
                        <PMSRCCLK2 value="0x011F0F98" edit="true" visible="true" name="PMSRCCLK2" help_text="This parameter assigns dynamic CLKRQ# control of SRC clocks." />
                        <ICCSSBV value="0x00000000" edit="true" visible="false" name="ICCSSBV" help_text="ICCSSBV" />
                        <ICCTMR value="0x00000000" edit="true" visible="false" name="ICCTMR" help_text="Integrated Clock Controller Timer" />
                     </IccRegisters>
                     <ClkRngDefRecord2>
                        <Clock1 name="120/27 MHz Graphics Clock (DIV1-S)">
                           <ClkDivMin value="0x0A00" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0A00" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="false" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="50" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x100" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock1>
                        <Clock2 name="Processor or Platform DMICLK (DIV2-S)">
                           <ClkDivMin value="0x0C00" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0C00" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="true" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="50" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x007" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock2>
                        <Clock3 name="PCH DMICLK (DIV3)">
                           <ClkDivMin value="0x0C00" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0C00" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="true" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="50" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x0D8" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock3>
                        <Clock4 name="120 MHz SSSC Graphics Clock (DIV4)">
                           <ClkDivMin value="0x09F2" edit="true" visible="true" name="Clock Div Min" help_text="Minimum allowed clock divisor value (minimum value is for maximum frequency)." />
                           <ClkDivMax value="0x0A0E" edit="true" visible="true" name="Clock Div Max" help_text="Maximum allowed clock divider value (maximum value is for minimum frequency)." />
                           <SscChngAllwd value="true" edit="true" visible="true" name="SSC Change Allowed Mask" help_text="true = SSC parameters of this clock resource can be controlled by the handled request record.  false = default parameters are used." />
                           <SscSprModeCtrlUpAllwd value="false" edit="true" visible="true" name="SSC Spread Mode Control Up" help_text="SSC Spread Mode Control Up" />
                           <SscSprModeCtrlCenterAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Center" help_text="SSC Spread Mode Control Center" />
                           <SscSprModeCtrlDownAllwd value="true" edit="true" visible="true" name="SSC Spread Mode Control Down" help_text="SSC Spread Mode Control Down" />
                           <SscSprPercentMax value="250" edit="true" visible="true" name="SSC Spread Percent Max" help_text="The caller of the interface can set SSC spread percent from 0 (SSC disabled) to this value.  The value should be SSC percent multiplied by 100.  Range supported is 0 to 250d (2.5%)" />
                           <ClockUsage value="0x200" edit="true" visible="true" name="Clock Usage" help_text="The overclocking BIOS and OS applications can know which clock is used as BCLK and is subject for CPU overclocking, which is used for integrated GFX display and is subject for underclocking." />
                        </Clock4>
                     </ClkRngDefRecord2>
                  </ICCProfile2>
               </ICCProfiles>
            </IccData>
         </Configuration>
      </Region2>
   </Chipset>
</ftoolRoot>